From: Alexandru Ardelean <alexandru.ardelean@analog.com>
Date: Fri, 10 Apr 2020 15:40:37 +0000 (+0800)
Subject: arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio'
X-Git-Tag: v5.10.7~2810^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6dd5d3b8ad2b5a30509c76f164a61b32351aafdd;p=platform%2Fkernel%2Flinux-rpi.git

arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio'

There is no more 'altr,gpio-bank-width' in the 'altr,pio-1.0' driver.
There is a 'altr,ngpio' which is  what the property wants to configure.

This change updates all occurrences of 'altr,gpio-bank-width' to
'altr,ngpio'.

Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---

diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
index 90c4469..b0dacb6 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
@@ -263,7 +263,7 @@ Overlay contains:
 			gpio@10040 {
 				compatible = "altr,pio-1.0";
 				reg = <0x10040 0x20>;
-				altr,gpio-bank-width = <4>;
+				altr,ngpio = <4>;
 				#gpio-cells = <2>;
 				clocks = <2>;
 				gpio-controller;
@@ -468,7 +468,7 @@ programming is the FPGA based bridge of fpga_region1.
 				compatible = "altr,pio-1.0";
 				reg = <0x10040 0x20>;
 				clocks = <0x2>;
-				altr,gpio-bank-width = <0x4>;
+				altr,ngpio = <0x4>;
 				resetvalue = <0x0>;
 				#gpio-cells = <0x2>;
 				gpio-controller;
diff --git a/arch/nios2/boot/dts/10m50_devboard.dts b/arch/nios2/boot/dts/10m50_devboard.dts
index 5e4ab03..739ad96 100644
--- a/arch/nios2/boot/dts/10m50_devboard.dts
+++ b/arch/nios2/boot/dts/10m50_devboard.dts
@@ -179,7 +179,7 @@
 		led_pio: gpio@180014d0 {
 			compatible = "altr,pio-1.0";
 			reg = <0x180014d0 0x00000010>;
-			altr,gpio-bank-width = <4>;
+			altr,ngpio = <4>;
 			resetvalue = <15>;
 			#gpio-cells = <2>;
 			gpio-controller;
@@ -190,7 +190,7 @@
 			reg = <0x180014c0 0x00000010>;
 			interrupt-parent = <&cpu>;
 			interrupts = <6>;
-			altr,gpio-bank-width = <3>;
+			altr,ngpio = <3>;
 			altr,interrupt-type = <2>;
 			edge_type = <1>;
 			level_trigger = <0>;