From: Atish Patra <atish.patra@wdc.com>
Date: Tue, 2 Oct 2018 19:14:58 +0000 (-0700)
Subject: RISC-V: Disable preemption before enabling interrupts
X-Git-Tag: v5.15~7669^2~3^2~9
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6db170ff4c088caaf7806c00b29a55f6df07d7b6;p=platform%2Fkernel%2Flinux-starfive.git

RISC-V: Disable preemption before enabling interrupts

Currently, irq is enabled before preemption disabling happens.
If the scheduler fired right here and cpu is scheduled then it
may blow up.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
[Atish: Commit text and code comment formatting update]
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---

diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 712e9ca..670749e 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -111,7 +111,11 @@ asmlinkage void __init smp_callin(void)
 	 * a local TLB flush right now just in case.
 	 */
 	local_flush_tlb_all();
-	local_irq_enable();
+	/*
+	 * Disable preemption before enabling interrupts, so we don't try to
+	 * schedule a CPU that hasn't actually started yet.
+	 */
 	preempt_disable();
+	local_irq_enable();
 	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 }