From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Fri, 18 Sep 2020 20:04:36 +0000 (-0400)
Subject: AMDGPU: Don't add frame register to frame pseudos
X-Git-Tag: llvmorg-13-init~11394
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6daddc213fe56dccf1e88de61065c7fee09deccf;p=platform%2Fupstream%2Fllvm.git

AMDGPU: Don't add frame register to frame pseudos

We no longer treat the frame register like a function argument, so the
problem this avoided is no longer relevant.
---

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index a91a652..73c6564 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -4179,13 +4179,8 @@ MachineBasicBlock *SITargetLowering::EmitInstrWithCustomInserter(
   case AMDGPU::ADJCALLSTACKDOWN: {
     const SIMachineFunctionInfo *Info = MF->getInfo<SIMachineFunctionInfo>();
     MachineInstrBuilder MIB(*MF, &MI);
-
-    // Add an implicit use of the frame offset reg to prevent the restore copy
-    // inserted after the call from being reorderd after stack operations in the
-    // the caller's frame.
     MIB.addReg(Info->getStackPtrOffsetReg(), RegState::ImplicitDefine)
-        .addReg(Info->getStackPtrOffsetReg(), RegState::Implicit)
-        .addReg(Info->getFrameOffsetReg(), RegState::Implicit);
+       .addReg(Info->getStackPtrOffsetReg(), RegState::Implicit);
     return BB;
   }
   case AMDGPU::SI_CALL_ISEL: {