From: Johannes Doerfert Date: Sat, 23 Jul 2022 04:56:12 +0000 (-0500) Subject: [Attributor][FIX] HasBeenWrittenTo logic should only be used for reads X-Git-Tag: upstream/15.0.7~723 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6b7eae11f162f33174ea9f5f446dcc3c1908457c;p=platform%2Fupstream%2Fllvm.git [Attributor][FIX] HasBeenWrittenTo logic should only be used for reads If we look at a write, we should not enact the "has been written to" logic introduced to avoid spurious write -> read dependences. Doing so lead to elimination of stores we needed, which is obviously bad. --- diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp index c29923bc4d92..45a0115ae982 100644 --- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -1069,7 +1069,7 @@ struct AAPointerInfoImpl bool Dominates = DT && Exact && Acc.isMustAccess() && (Acc.getLocalInst()->getFunction() == &Scope) && DT->dominates(Acc.getRemoteInst(), &I); - if (Dominates) + if (FindInterferingWrites && Dominates) HasBeenWrittenTo = true; // For now we only filter accesses based on CFG reasoning which does not diff --git a/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll b/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll index 3e769ca0bb79..a3186e7373f4 100644 --- a/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll +++ b/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll @@ -2674,6 +2674,7 @@ define i32 @static_global_not_simplifiable_2(i32 %cnd) { ; IS__TUNIT_NPM-NEXT: store i32 1, i32* @Flag4, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: call void @sync() #[[ATTR14:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load i32, i32* @Flag4, align 4, !tbaa [[TBAA3]] +; IS__TUNIT_NPM-NEXT: store i32 2, i32* @Flag4, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: ret i32 [[I]] ; ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@static_global_not_simplifiable_2 @@ -2691,6 +2692,7 @@ define i32 @static_global_not_simplifiable_2(i32 %cnd) { ; IS__CGSCC_NPM-NEXT: store i32 1, i32* @Flag4, align 4, !tbaa [[TBAA3]] ; IS__CGSCC_NPM-NEXT: call void @sync() #[[ATTR16:[0-9]+]] ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = load i32, i32* @Flag4, align 4, !tbaa [[TBAA3]] +; IS__CGSCC_NPM-NEXT: store i32 2, i32* @Flag4, align 4, !tbaa [[TBAA3]] ; IS__CGSCC_NPM-NEXT: ret i32 [[I]] ; entry: