From: Nian Jing Date: Mon, 22 Oct 2018 08:36:28 +0000 (+0800) Subject: media: video: fix cvbs black dot issue [1/1] X-Git-Tag: hardkernel-4.9.236-104~2092 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6b68ab0158d76cb3fcb8fcb7ed0dda0543de664c;p=platform%2Fkernel%2Flinux-amlogic.git media: video: fix cvbs black dot issue [1/1] PD#SWPL-1910 Problem: Black dot on cvbsout when local play 4k Solution: Set limit rang when vpp output yuv for cvbs Verify: test pass on u200/s905x Change-Id: Ia3e93078eb1a00d8c974bae8cc373a3a679f8b9f Signed-off-by: Nian Jing --- diff --git a/drivers/amlogic/media/enhancement/amvecm/amvecm.c b/drivers/amlogic/media/enhancement/amvecm/amvecm.c index ef1af54..a06833b 100644 --- a/drivers/amlogic/media/enhancement/amvecm/amvecm.c +++ b/drivers/amlogic/media/enhancement/amvecm/amvecm.c @@ -4133,6 +4133,21 @@ void amvecm_sharpness_enable(int sel) } } +void amvecm_clip_range_limit(bool limit_en) +{ + /*fix mbox av out flicker black dot*/ + if (limit_en) { + /*cvbs output 16-235 16-240 16-240*/ + WRITE_VPP_REG(VPP_CLIP_MISC0, 0x3acf03c0); + WRITE_VPP_REG(VPP_CLIP_MISC1, 0x4010040); + } else { + /*retore for other mode*/ + WRITE_VPP_REG(VPP_CLIP_MISC0, 0x3fffffff); + WRITE_VPP_REG(VPP_CLIP_MISC1, 0x0); + } +} +EXPORT_SYMBOL(amvecm_clip_range_limit); + static void amvecm_pq_enable(int enable) { if (enable) { diff --git a/drivers/amlogic/media/enhancement/amvecm/arch/vpp_regs.h b/drivers/amlogic/media/enhancement/amvecm/arch/vpp_regs.h index aab564f..ec7f639 100644 --- a/drivers/amlogic/media/enhancement/amvecm/arch/vpp_regs.h +++ b/drivers/amlogic/media/enhancement/amvecm/arch/vpp_regs.h @@ -834,6 +834,8 @@ #define VPP_POST_MATRIX_PRE_OFFSET2 0x32bc #define VPP_POST_MATRIX_EN_CTRL 0x32bd +#define VPP_POST_MATRIX_SAT 0x32c1 + #define VPP_POST2_MATRIX_COEF00_01 0x39a0 #define VPP_POST2_MATRIX_COEF02_10 0x39a1 #define VPP_POST2_MATRIX_COEF11_12 0x39a2 diff --git a/drivers/amlogic/media/video_sink/video.c b/drivers/amlogic/media/video_sink/video.c index f4a70fe..c526f61 100644 --- a/drivers/amlogic/media/video_sink/video.c +++ b/drivers/amlogic/media/video_sink/video.c @@ -10217,10 +10217,6 @@ static int __init video_early_init(void) VD2_IF0_LUMA_FIFO_SIZE + cur_dev->viu_off, 0x180); } - /*fix S905 av out flicker black dot*/ - if (is_meson_gxbb_cpu()) - SET_VCBUS_REG_MASK(VPP_MISC, VPP_OUT_SATURATE); - #if 0 /* if (0 >= VMODE_MAX) //DEBUG_TMP */ CLEAR_VCBUS_REG_MASK(VPP_VSC_PHASE_CTRL, VPP_PHASECTL_TYPE_INTERLACE); diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_out.c b/drivers/amlogic/media/vout/cvbs/cvbs_out.c index b43981b..52f9e6f 100644 --- a/drivers/amlogic/media/vout/cvbs/cvbs_out.c +++ b/drivers/amlogic/media/vout/cvbs/cvbs_out.c @@ -592,6 +592,8 @@ static int cvbs_set_current_vmode(enum vmode_e mode) tvmode, info->vinfo->sync_duration_den, info->vinfo->sync_duration_num); + /*set limit range for enci*/ + amvecm_clip_range_limit(1); if (mode & VMODE_INIT_BIT_MASK) { cvbs_out_vpu_power_ctrl(1); cvbs_out_clk_gate_ctrl(1); @@ -624,6 +626,9 @@ static int cvbs_module_disable(enum vmode_e cur_vmod) info->dwork_flag = 0; cvbs_cntl_output(0); + /*restore full range for encp/encl*/ + amvecm_clip_range_limit(0); + cvbs_out_vpu_power_ctrl(0); cvbs_out_clk_gate_ctrl(0); diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_out.h b/drivers/amlogic/media/vout/cvbs/cvbs_out.h index c931f95..20a5776 100644 --- a/drivers/amlogic/media/vout/cvbs/cvbs_out.h +++ b/drivers/amlogic/media/vout/cvbs/cvbs_out.h @@ -98,5 +98,6 @@ struct cvbsregs_set_t { const struct reg_s *enc_reg_setting; }; +extern void amvecm_clip_range_limit(bool limit_en); #endif diff --git a/include/linux/amlogic/media/registers/regs/vpp_regs.h b/include/linux/amlogic/media/registers/regs/vpp_regs.h index 447a1ef..c82b4ba 100644 --- a/include/linux/amlogic/media/registers/regs/vpp_regs.h +++ b/include/linux/amlogic/media/registers/regs/vpp_regs.h @@ -190,6 +190,9 @@ #define VPP_OSD_SCALE_COEF 0x1dcd #define VPP_INT_LINE_NUM 0x1dce +#define VPP_CLIP_MISC0 0x1dd9 +#define VPP_CLIP_MISC1 0x1dda + #define VPP2_MISC 0x1e26 #define VPP2_OFIFO_SIZE 0x1e27 #define VPP2_INT_LINE_NUM 0x1e20 @@ -206,6 +209,8 @@ #define SRSHARP1_SHARP_DNLP_EN 0x32c5 #define SRSHARP1_SHARP_SR2_CTRL 0x32d7 +#define VPP_POST_MATRIX_SAT 0x32c1 + /* g12a vd2 pps */ #define VD2_SCALE_COEF_IDX 0x3943 #define VD2_SCALE_COEF 0x3944