From: Palmer Dabbelt <palmer@rivosinc.com>
Date: Thu, 17 Mar 2022 21:09:16 +0000 (-0700)
Subject: RISC-V: Provide a fraemework for RISC-V ISA extensions
X-Git-Tag: v6.6.17~7916^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6b57ac02b45f7f676c81b1357e7e5d63a974bf60;p=platform%2Fkernel%2Flinux-rpi.git

RISC-V: Provide a fraemework for RISC-V ISA extensions

This series implements a generic framework to parse multi-letter ISA
extensions.

* palmer/riscv-isa:
  RISC-V: Improve /proc/cpuinfo output for ISA extensions
  RISC-V: Do no continue isa string parsing without correct XLEN
  RISC-V: Implement multi-letter ISA extension probing framework
  RISC-V: Extract multi-letter extension names from "riscv, isa"
  RISC-V: Minimal parser for "riscv, isa" strings
  RISC-V: Correctly print supported extensions
---

6b57ac02b45f7f676c81b1357e7e5d63a974bf60