From: Michael Ellerman Date: Tue, 10 Jul 2018 02:08:36 +0000 (+1000) Subject: Documentation: Add powerpc options for spec_store_bypass_disable X-Git-Tag: v4.19~427^2~17 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6b4c1360e8adc2cbecf400b97c1ffcf9c5aad31e;p=platform%2Fkernel%2Flinux-rpi3.git Documentation: Add powerpc options for spec_store_bypass_disable Document the support for spec_store_bypass_disable that was added for powerpc in commit a048a07d7f45 ("powerpc/64s: Add support for a store forwarding barrier at kernel entry/exit"). Signed-off-by: Michael Ellerman Reviewed-by: Kees Cook Acked-by: Thomas Gleixner Signed-off-by: Jonathan Corbet --- diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 533ff5c..4bb6004 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -4060,6 +4060,8 @@ This parameter controls whether the Speculative Store Bypass optimization is used. + On x86 the options are: + on - Unconditionally disable Speculative Store Bypass off - Unconditionally enable Speculative Store Bypass auto - Kernel detects whether the CPU model contains an @@ -4075,12 +4077,20 @@ seccomp - Same as "prctl" above, but all seccomp threads will disable SSB unless they explicitly opt out. - Not specifying this option is equivalent to - spec_store_bypass_disable=auto. - Default mitigations: X86: If CONFIG_SECCOMP=y "seccomp", otherwise "prctl" + On powerpc the options are: + + on,auto - On Power8 and Power9 insert a store-forwarding + barrier on kernel entry and exit. On Power7 + perform a software flush on kernel entry and + exit. + off - No action. + + Not specifying this option is equivalent to + spec_store_bypass_disable=auto. + spia_io_base= [HW,MTD] spia_fio_base= spia_pedr=