From: Robert Beckett Date: Wed, 7 Dec 2022 12:13:49 +0000 (+0100) Subject: dt-bindings: media: wave5: add yaml devicetree bindings X-Git-Tag: accepted/tizen/unified/riscv/20231013.094029~18 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6b195aae33f452c60523d967e5652ffc1b5e36af;p=platform%2Fkernel%2Flinux-starfive.git dt-bindings: media: wave5: add yaml devicetree bindings Add bindings for the wave5 chips&media codec driver Signed-off-by: Robert Beckett Signed-off-by: Dafna Hirschfeld Signed-off-by: Sebastian Fricke [sw0312.kim: cherry-pick the commit cd9148ef1b14 from https://github.com/starfive-tech/linux/tree/JH7110_VisionFive2_6.1.y_devel] Signed-off-by: Seung-Woo Kim Change-Id: I754cbc1e881b7ee8ff6a9c3da15cfc3f5900d1b0 --- diff --git a/Documentation/devicetree/bindings/cnm,wave5.yml b/Documentation/devicetree/bindings/cnm,wave5.yml new file mode 100644 index 000000000000..01dddebb162e --- /dev/null +++ b/Documentation/devicetree/bindings/cnm,wave5.yml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/wave5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Chips&Media Wave 5 Series multi-standard codec IP + +maintainers: + - Nas Chung + - Robert Beckett + - Sebastian Fricke + +description: |- + The Chips&Media WAVE codec IP is a multi format video encoder/decoder + +properties: + compatible: + anyOf: + - items: + - enum: + - cnm,cm511-vpu + - cnm,cm517-vpu + - cnm,cm521-vpu + - cnm,cm521c-vpu + - cnm,cm521c-dual-vpu + - cnm,cm521e1-vpu + - cnm,cm537-vpu + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + sram: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle pointing to the SRAM device node + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + vpu: video-codec@12345678 { + compatible = "cnm,cm521-vpu"; + reg = <0x12345678 0x1000>; + interrupts = <42>; + clocks = <&clks 42>; + clock-names = "vcodec"; + sram = <&sram>; + };