From: Khem Raj <raj.khem@gmail.com>
Date: Tue, 8 May 2012 18:53:08 +0000 (-0700)
Subject: site/sh-common: Add missing caches variables to build glib-2.32
X-Git-Tag: rev_ivi_2015_02_04~17222
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=69ecef9ac3d4a975d5bf27c41927a905c1750fdb;p=scm%2Fbb%2Ftizen-distro.git

site/sh-common: Add missing caches variables to build glib-2.32

This is on the same tone as done for other architectures

(From OE-Core rev: 7bdc3a07d3212d7fc820c77ba509e476cc7aa672)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
---

diff --git a/meta/site/sh-common b/meta/site/sh-common
index c386266..bde416a 100644
--- a/meta/site/sh-common
+++ b/meta/site/sh-common
@@ -147,6 +147,10 @@ glib_cv_sizeof_system_thread=${glib_cv_sizeof_system_thread=4}
 glib_cv_sys_use_pid_niceness_surrogate=${glib_cv_sys_use_pid_niceness_surrogate=yes}
 
 glib_cv_strlcpy=${glib_cv_strlcpy=no}
+glib_cv_va_val_copy=${glib_cv_va_val_copy=yes}
+ac_cv_alignof_guint32=4
+ac_cv_alignof_guint64=8
+ac_cv_alignof_unsigned_long=4
 
 # httppc
 ac_cv_strerror_r_SUSv3=${ac_cv_strerror_r_SUSv3=no}