From: John Crispin Date: Wed, 4 Nov 2015 10:50:14 +0000 (+0100) Subject: MIPS: ralink: Add missing clock on rt305x X-Git-Tag: v4.14-rc1~4301^2~20 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=69ebed7dc9311ea383dd0b9542c823a51b20e679;p=platform%2Fkernel%2Flinux-rpi.git MIPS: ralink: Add missing clock on rt305x The rt305x support is missing a clock required by the ethernet driver. Signed-off-by: John Crispin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11447/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c index 7e11f00..9e45725 100644 --- a/arch/mips/ralink/rt305x.c +++ b/arch/mips/ralink/rt305x.c @@ -199,6 +199,7 @@ void __init ralink_clk_init(void) } ralink_clk_add("cpu", cpu_rate); + ralink_clk_add("sys", sys_rate); ralink_clk_add("10000b00.spi", sys_rate); ralink_clk_add("10000100.timer", wdt_rate); ralink_clk_add("10000120.watchdog", wdt_rate);