From: Fangrui Song <i@maskray.me>
Date: Tue, 6 Jun 2023 20:06:21 +0000 (-0700)
Subject: [ELF] Add PT_RISCV_ATTRIBUTES program header
X-Git-Tag: upstream/17.0.6~5942
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=698ac4aba555fa74f6f9310578c9b9bf42beaea0;p=platform%2Fupstream%2Fllvm.git

[ELF] Add PT_RISCV_ATTRIBUTES program header

Close https://github.com/llvm/llvm-project/issues/63084

Unlike AArch32, RISC-V defines PT_RISCV_ATTRIBUTES to include the
SHT_RISCV_ATTRIBUTES section. There is no real-world use case yet.

We place PT_RISCV_ATTRIBUTES after PT_GNU_STACK, similar to PT_ARM_EXIDX. GNU ld
places PT_RISCV_ATTRIBUTES earlier, but the placement should not matter.

Link: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/71

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D152065
---

diff --git a/lld/ELF/Writer.cpp b/lld/ELF/Writer.cpp
index 2a369ac..25cb67a 100644
--- a/lld/ELF/Writer.cpp
+++ b/lld/ELF/Writer.cpp
@@ -2035,6 +2035,9 @@ template <class ELFT> void Writer<ELFT>::finalizeSections() {
         addPhdrForSection(part, SHT_MIPS_OPTIONS, PT_MIPS_OPTIONS, PF_R);
         addPhdrForSection(part, SHT_MIPS_ABIFLAGS, PT_MIPS_ABIFLAGS, PF_R);
       }
+      if (config->emachine == EM_RISCV)
+        addPhdrForSection(part, SHT_RISCV_ATTRIBUTES, PT_RISCV_ATTRIBUTES,
+                          PF_R);
     }
     Out::programHeaders->size = sizeof(Elf_Phdr) * mainPart->phdrs.size();
 
diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index bf3b84b..dea0d95e 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -28,6 +28,8 @@ ELF Improvements
 
 * ``--remap-inputs=`` and ``--remap-inputs-file=`` are added to remap input files.
   (`D148859 <https://reviews.llvm.org/D148859>`_)
+* ``PT_RISCV_ATTRIBUTES`` is added to include the SHT_RISCV_ATTRIBUTES section.
+  (`D152065 <https://reviews.llvm.org/D152065>`_)
 
 Breaking changes
 ----------------
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 147312c..d0ce094 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -3,7 +3,7 @@
 # RUN: rm -rf %t && split-file %s %t && cd %t
 # RUN: llvm-mc -filetype=obj -triple=riscv64 a.s -o a.o
 # RUN: ld.lld -e 0 a.o -o out 2>&1 | count 0
-# RUN: llvm-readobj --arch-specific out | FileCheck %s
+# RUN: llvm-readelf -S -l --arch-specific out | FileCheck %s --check-prefixes=HDR,CHECK
 # RUN: ld.lld -e 0 a.o a.o -o out1 2>&1 | count 0
 # RUN: llvm-readobj --arch-specific out1 | FileCheck %s
 # RUN: ld.lld -r a.o a.o -o out1 2>&1 | count 0
@@ -63,6 +63,14 @@
 # UNKNOWN22-COUNT-2: warning: unknown22.o:(.riscv.attributes): invalid tag 0x16 at offset 0x10
 # UNKNOWN22:         warning: unknown22a.o:(.riscv.attributes): invalid tag 0x16 at offset 0x10
 
+# HDR:      Name              Type             Address          Off    Size   ES Flg Lk Inf Al
+# HDR:      .riscv.attributes RISCV_ATTRIBUTES 0000000000000000 000158 00003e 00      0   0  1{{$}}
+
+# HDR:      Type           Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align
+# HDR:      LOAD           0x000000 0x0000000000010000 0x0000000000010000 0x000158 0x000158 R   0x1000
+# HDR-NEXT: GNU_STACK      0x000000 0x0000000000000000 0x0000000000000000 0x000000 0x000000 RW  0
+# HDR-NEXT: ATTRIBUTES     0x000158 0x0000000000000000 0x0000000000000000 0x00003e 0x00003e R   0x1{{$}}
+
 # CHECK:      BuildAttributes {
 # CHECK-NEXT:   FormatVersion: 0x41
 # CHECK-NEXT:   Section 1 {