From: Oleg Endo <olegendo@gcc.gnu.org>
Date: Sun, 12 Aug 2012 22:50:51 +0000 (+0000)
Subject: sh.md (prefetch): Simplify expander.
X-Git-Tag: upstream/12.2.0~74813
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=69853ea9b895d591b16eb2557ce32f5b8c094450;p=platform%2Fupstream%2Fgcc.git

sh.md (prefetch): Simplify expander.

	* config/sh/sh.md (prefetch): Simplify expander.  Fix condition to
	allow SH3.
	(*prefetch_media): Move insn below expander.
	(*prefetch): Fix condition to allow SH3.

	* gcc.target/sh/prefetch.c: Add -m3* to inclusion list.

From-SVN: r190332
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c327437..35390e4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
 2012-08-12  Oleg Endo  <olegendo@gcc.gnu.org>
 
+	* config/sh/sh.md (prefetch): Simplify expander.  Fix condition to
+	allow SH3.
+	(*prefetch_media): Move insn below expander.
+	(*prefetch): Fix condition to allow SH3.
+
+2012-08-12  Oleg Endo  <olegendo@gcc.gnu.org>
+
 	PR target/51244
 	* config/sh/sh.md: Add splits for inverted compare and branch
 	opportunities.
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 8af99f8..aee416e 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -13868,44 +13868,36 @@ label:
   "byterev	%1, %0"
   [(set_attr "type" "arith_media")])
 
-(define_insn "*prefetch_media"
-  [(prefetch (match_operand:QI 0 "address_operand" "p")
-             (match_operand:SI 1 "const_int_operand" "n")
-             (match_operand:SI 2 "const_int_operand" "n"))]
-  "TARGET_SHMEDIA"
-{
-  operands[0] = gen_rtx_MEM (QImode, operands[0]);
-  output_asm_insn ("ld%M0.b    %m0,r63", operands);
-  return "";
-}
-  [(set_attr "type" "other")])
-
 ;; In user mode, the "pref" instruction will raise a RADDERR exception
 ;; for accesses to [0x80000000,0xffffffff].  This makes it an unsuitable
 ;; implementation of __builtin_prefetch for VxWorks RTPs.
 (define_expand "prefetch"
-  [(prefetch (match_operand 0 "address_operand" "p")
-             (match_operand:SI 1 "const_int_operand" "n")
-             (match_operand:SI 2 "const_int_operand" "n"))]
-  "TARGET_SH2A || ((TARGET_HARD_SH4 || TARGET_SH5)
-   && (TARGET_SHMEDIA || !TARGET_VXWORKS_RTP))"
-{
-  if (GET_MODE (operands[0]) != Pmode
-      || !CONST_INT_P (operands[1])
-      || !CONST_INT_P (operands[2]))
-    FAIL;
-  if (! TARGET_SHMEDIA)
-    operands[0] = force_reg (Pmode, operands[0]);
-})
+  [(prefetch (match_operand 0 "address_operand" "")
+             (match_operand:SI 1 "const_int_operand" "")
+             (match_operand:SI 2 "const_int_operand" ""))]
+  "(TARGET_SH2A || TARGET_SH3 || TARGET_SH5)
+   && (TARGET_SHMEDIA || ! TARGET_VXWORKS_RTP)")
 
 (define_insn "*prefetch"
   [(prefetch (match_operand:SI 0 "register_operand" "r")
 	     (match_operand:SI 1 "const_int_operand" "n")
 	     (match_operand:SI 2 "const_int_operand" "n"))]
-  "(TARGET_SH2A || TARGET_HARD_SH4 || TARGET_SHCOMPACT) && !TARGET_VXWORKS_RTP"
+  "(TARGET_SH2A || TARGET_SH3 || TARGET_SHCOMPACT) && ! TARGET_VXWORKS_RTP"
   "pref	@%0"
   [(set_attr "type" "other")])
 
+(define_insn "*prefetch_media"
+  [(prefetch (match_operand:QI 0 "address_operand" "p")
+             (match_operand:SI 1 "const_int_operand" "n")
+             (match_operand:SI 2 "const_int_operand" "n"))]
+  "TARGET_SHMEDIA"
+{
+  operands[0] = gen_rtx_MEM (QImode, operands[0]);
+  output_asm_insn ("ld%M0.b    %m0,r63", operands);
+  return "";
+}
+  [(set_attr "type" "other")])
+
 (define_insn "alloco_i"
   [(set (mem:BLK (match_operand:QI 0 "cache_address_operand" "p"))
 	(unspec:BLK [(const_int 0)] UNSPEC_ALLOCO))]
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f8b5221..a9df8b7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,9 @@
 2012-08-12  Oleg Endo  <olegendo@gcc.gnu.org>
 
+	* gcc.target/sh/prefetch.c: Add -m3* to inclusion list.
+
+2012-08-12  Oleg Endo  <olegendo@gcc.gnu.org>
+
 	PR target/51244
 	* gcc.target/sh/pr51244-7.c: New.
 	* gcc.target/sh/pr51244-8.c: New.
diff --git a/gcc/testsuite/gcc.target/sh/prefetch.c b/gcc/testsuite/gcc.target/sh/prefetch.c
index b34b115..e087373 100644
--- a/gcc/testsuite/gcc.target/sh/prefetch.c
+++ b/gcc/testsuite/gcc.target/sh/prefetch.c
@@ -2,7 +2,7 @@
    instruction PREF @Rm.  */
 /* { dg-do assemble {target sh*-*-*}}  */
 /* { dg-options "-O0" }  */
-/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" "-m4*" } }  */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" "-m3*" "-m4*" } }  */
 /* { dg-final { scan-assembler "pref"} }  */
 
 void