From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sun, 16 May 2004 15:56:04 +0000 (+0000)
Subject: BSR/BSF undefined behaviour fix
X-Git-Tag: TizenStudio_2.0_p2.3~15405
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=686f3f266b829b06c7b170db7b4ce97abfbfc517;p=sdk%2Femulator%2Fqemu.git

BSR/BSF undefined behaviour fix


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@809 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-i386/ops_template.h b/target-i386/ops_template.h
index 037c430..2ff1f66 100644
--- a/target-i386/ops_template.h
+++ b/target-i386/ops_template.h
@@ -513,7 +513,7 @@ void OPPROTO glue(glue(op_bsf, SUFFIX), _T0_cc)(void)
             count++;
             res >>= 1;
         }
-        T0 = count;
+        T1 = count;
         CC_DST = 1; /* ZF = 0 */
     } else {
         CC_DST = 0; /* ZF = 1 */
@@ -531,7 +531,7 @@ void OPPROTO glue(glue(op_bsr, SUFFIX), _T0_cc)(void)
             count--;
             res <<= 1;
         }
-        T0 = count;
+        T1 = count;
         CC_DST = 1; /* ZF = 0 */
     } else {
         CC_DST = 0; /* ZF = 1 */
diff --git a/target-i386/translate.c b/target-i386/translate.c
index c6aa503..514399d 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -3708,10 +3708,11 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start)
         modrm = ldub_code(s->pc++);
         reg = (modrm >> 3) & 7;
         gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0);
+        /* NOTE: in order to handle the 0 case, we must load the
+           result. It could be optimized with a generated jump */
+        gen_op_mov_TN_reg[ot][1][reg]();
         gen_op_bsx_T0_cc[ot - OT_WORD][b & 1]();
-        /* NOTE: we always write back the result. Intel doc says it is
-           undefined if T0 == 0 */
-        gen_op_mov_reg_T0[ot][reg]();
+        gen_op_mov_reg_T1[ot][reg]();
         s->cc_op = CC_OP_LOGICB + ot;
         break;
         /************************/