From: Stephen Boyd Date: Tue, 22 Jun 2021 20:01:30 +0000 (-0700) Subject: Merge tag 'clk-meson-v5.14-1' of https://github.com/BayLibre/clk-meson into clk-amlogic X-Git-Tag: accepted/tizen/unified/20230118.172025~6866^2~11^3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=686f225039be2846845349669edbfc5771ba647a;p=platform%2Fkernel%2Flinux-rpi.git Merge tag 'clk-meson-v5.14-1' of https://github.com/BayLibre/clk-meson into clk-amlogic Pull Amlogic clk driver updates from Jerome Brunet: - Use determine_rate() for the pll ops instead of round_rate() - Restrict gp0/1 and audio plls range on g12a/sm1 - Improve axg-audio controller error on deferral - Add NNA clocks on g12a * tag 'clk-meson-v5.14-1' of https://github.com/BayLibre/clk-meson: clk: meson: g12a: Add missing NNA source clocks for g12b clk: meson: axg-audio: improve deferral handling clk: meson: g12a: fix gp0 and hifi ranges clk: meson: pll: switch to determine_rate for the PLL ops --- 686f225039be2846845349669edbfc5771ba647a