From: Jordan Justen Date: Tue, 26 Jan 2021 07:01:52 +0000 (-0800) Subject: intel/dev: Add (disabled) device info for MTL X-Git-Tag: upstream/23.3.3~16119 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=686ada78cdc642340b91b35ef00da0452a462966;p=platform%2Fupstream%2Fmesa.git intel/dev: Add (disabled) device info for MTL Reworks: * Jordan: INTEL_PLATFORM_MTL_M/INTEL_PLATFORM_MTL_P * Lionel: .has_coarse_pixel_primitive_and_cb * Jordan: .has_mesh_shading & .has_ray_tracing * Paulo: .has_64bit_float * José: .has_integer_dword_mul (BSpec: 47431) * Jordan: Comment pci device ids for now similar to DG2: * 70a4e646852 ("intel: Add *disabled* device ids for DG2") * ad565f6b70d ("intel/dev: Enable first set of DG2 PCI IDs") Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736 Signed-off-by: Jordan Justen Signed-off-by: Lionel Landwerlin Signed-off-by: José Roberto de Souza Reviewed-by: José Roberto de Souza Part-of: --- diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h index 8fdae14..fd8c32a 100644 --- a/include/pci_ids/iris_pci_ids.h +++ b/include/pci_ids/iris_pci_ids.h @@ -244,3 +244,9 @@ CHIPSET(0x56b2, dg2_g12, "DG2", "Intel(R) Graphics") CHIPSET(0x56b3, dg2_g12, "DG2", "Intel(R) Graphics") CHIPSET(0x56c0, dg2_g10, "ATS-M", "Intel(R) Data Center GPU Flex Series 170 Graphics") CHIPSET(0x56c1, dg2_g11, "ATS-M", "Intel(R) Data Center GPU Flex Series 140 Graphics") + +/* CHIPSET(0x7d40, mtl_m, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7d45, mtl_p, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7d55, mtl_p, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7d60, mtl_m, "MTL", "Intel(R) Graphics") */ +/* CHIPSET(0x7dd5, mtl_p, "MTL", "Intel(R) Graphics") */ diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c index 40e0f06..5d32853 100644 --- a/src/intel/dev/intel_device_info.c +++ b/src/intel/dev/intel_device_info.c @@ -73,6 +73,7 @@ static const struct { { "sg1", 0x4907 }, { "rpl", 0xa780 }, { "dg2", 0x5690 }, + { "mtl", 0x7d60 }, }; /** @@ -1083,6 +1084,28 @@ static const struct intel_device_info intel_device_info_dg2_g12 = { .platform = INTEL_PLATFORM_DG2_G12, }; +#define MTL_FEATURES \ + /* (Sub)slice info comes from the kernel topology info */ \ + XEHP_FEATURES(0, 1, 0), \ + .num_subslices = dual_subslices(1), \ + .has_local_mem = false, \ + .apply_hwconfig = true, \ + .has_64bit_float = true, \ + .has_integer_dword_mul = false, \ + .has_coarse_pixel_primitive_and_cb = true, \ + .has_mesh_shading = true, \ + .has_ray_tracing = true + +UNUSED static const struct intel_device_info intel_device_info_mtl_m = { + MTL_FEATURES, + .platform = INTEL_PLATFORM_MTL_M, +}; + +UNUSED static const struct intel_device_info intel_device_info_mtl_p = { + MTL_FEATURES, + .platform = INTEL_PLATFORM_MTL_P, +}; + static void reset_masks(struct intel_device_info *devinfo) {