From: Marek Vasut <marek.vasut+renesas@gmail.com>
Date: Sat, 31 Aug 2019 15:33:06 +0000 (+0200)
Subject: sh: tmu: Fix SH4 TCNT0 offset
X-Git-Tag: v2019.10-rc4~18^2~5
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6756762024ccacf48e1419a02e0880f337a9030f;p=platform%2Fkernel%2Fu-boot.git

sh: tmu: Fix SH4 TCNT0 offset

Fix the offset of TCNT0 register, which is 0xc on SH4.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---

diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h
index df38c82..406156d 100644
--- a/arch/sh/include/asm/config.h
+++ b/arch/sh/include/asm/config.h
@@ -10,7 +10,7 @@
 
 /* Timer */
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
-#define CONFIG_SYS_TIMER_COUNTER	(TMU_BASE + 0x8)	/* TCNT0 */
+#define CONFIG_SYS_TIMER_COUNTER	(TMU_BASE + 0xc)	/* TCNT0 */
 #define CONFIG_SYS_TIMER_RATE		(CONFIG_SYS_CLK_FREQ / 4)
 
 #endif