From: Eric Anholt Date: Wed, 24 Sep 2014 21:23:25 +0000 (-0700) Subject: vc4: Add support for point size setting. X-Git-Tag: upstream/17.1.0~23275 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=66b7bd60e01fd17a356bf26d69ea351261080586;p=platform%2Fupstream%2Fmesa.git vc4: Add support for point size setting. This is the support for both the global and per-vertex modes. --- diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c index c88e43c..0c06bfd 100644 --- a/src/gallium/drivers/vc4/vc4_draw.c +++ b/src/gallium/drivers/vc4/vc4_draw.c @@ -153,7 +153,11 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) 1); cl_start_shader_reloc(&vc4->shader_rec, 3 + vtx->num_elements); - cl_u16(&vc4->shader_rec, VC4_SHADER_FLAG_ENABLE_CLIPPING); + cl_u16(&vc4->shader_rec, + VC4_SHADER_FLAG_ENABLE_CLIPPING | + ((info->mode == PIPE_PRIM_POINTS && + vc4->rasterizer->base.point_size_per_vertex) ? + VC4_SHADER_FLAG_VS_POINT_SIZE : 0)); cl_u8(&vc4->shader_rec, 0); /* fs num uniforms (unused) */ cl_u8(&vc4->shader_rec, vc4->prog.fs->num_inputs); cl_reloc(vc4, &vc4->shader_rec, vc4->prog.fs->bo, 0); diff --git a/src/gallium/drivers/vc4/vc4_emit.c b/src/gallium/drivers/vc4/vc4_emit.c index 0f533f0..8df7073 100644 --- a/src/gallium/drivers/vc4/vc4_emit.c +++ b/src/gallium/drivers/vc4/vc4_emit.c @@ -54,6 +54,9 @@ vc4_emit_state(struct pipe_context *pctx) cl_u16(&vc4->bcl, vc4->rasterizer->offset_factor); cl_u16(&vc4->bcl, vc4->rasterizer->offset_units); + cl_u8(&vc4->bcl, VC4_PACKET_POINT_SIZE); + cl_f(&vc4->bcl, vc4->rasterizer->point_size); + cl_u8(&vc4->bcl, VC4_PACKET_LINE_WIDTH); cl_f(&vc4->bcl, vc4->rasterizer->base.line_width); } diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index 315a857..a520922 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -67,6 +67,7 @@ struct vc4_fs_key { struct vc4_vs_key { struct vc4_key base; enum pipe_format attr_formats[8]; + bool per_vertex_point_size; }; static void @@ -934,6 +935,9 @@ emit_tgsi_declaration(struct vc4_compile *c, case TGSI_SEMANTIC_COLOR: c->output_color_index = decl->Range.First * 4; break; + case TGSI_SEMANTIC_PSIZE: + c->output_point_size_index = decl->Range.First * 4; + break; } break; @@ -1432,6 +1436,24 @@ emit_rcp_wc_write(struct vc4_compile *c, struct qreg rcp_w) } static void +emit_point_size_write(struct vc4_compile *c) +{ + struct qreg point_size; + + if (c->output_point_size_index) + point_size = c->outputs[c->output_point_size_index + 3]; + else + point_size = qir_uniform_f(c, 1.0); + + /* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835, + * BCM21553). + */ + point_size = qir_FMAX(c, point_size, qir_uniform_f(c, .125)); + + qir_VPM_WRITE(c, point_size); +} + +static void emit_vert_end(struct vc4_compile *c) { struct qreg rcp_w = qir_RCP(c, c->outputs[3]); @@ -1439,6 +1461,8 @@ emit_vert_end(struct vc4_compile *c) emit_scaled_viewport_write(c, rcp_w); emit_zs_write(c, rcp_w); emit_rcp_wc_write(c, rcp_w); + if (c->vs_key->per_vertex_point_size) + emit_point_size_write(c); for (int i = 4; i < c->num_outputs; i++) { qir_VPM_WRITE(c, c->outputs[i]); @@ -1456,6 +1480,8 @@ emit_coord_end(struct vc4_compile *c) emit_scaled_viewport_write(c, rcp_w); emit_zs_write(c, rcp_w); emit_rcp_wc_write(c, rcp_w); + if (c->vs_key->per_vertex_point_size) + emit_point_size_write(c); } static struct vc4_compile * @@ -1700,7 +1726,7 @@ vc4_update_compiled_fs(struct vc4_context *vc4, uint8_t prim_mode) } static void -vc4_update_compiled_vs(struct vc4_context *vc4) +vc4_update_compiled_vs(struct vc4_context *vc4, uint8_t prim_mode) { struct vc4_vs_key local_key; struct vc4_vs_key *key = &local_key; @@ -1712,6 +1738,10 @@ vc4_update_compiled_vs(struct vc4_context *vc4) for (int i = 0; i < ARRAY_SIZE(key->attr_formats); i++) key->attr_formats[i] = vc4->vtx->pipe[i].src_format; + key->per_vertex_point_size = + (prim_mode == PIPE_PRIM_POINTS && + vc4->rasterizer->base.point_size_per_vertex); + vc4->prog.vs = util_hash_table_get(vc4->vs_cache, key); if (vc4->prog.vs) return; @@ -1730,7 +1760,7 @@ void vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode) { vc4_update_compiled_fs(vc4, prim_mode); - vc4_update_compiled_vs(vc4); + vc4_update_compiled_vs(vc4, prim_mode); } static unsigned diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h index 0a2c685..6a2e3c4 100644 --- a/src/gallium/drivers/vc4/vc4_qir.h +++ b/src/gallium/drivers/vc4/vc4_qir.h @@ -238,6 +238,7 @@ struct vc4_compile { uint32_t num_texture_samples; uint32_t output_position_index; uint32_t output_color_index; + uint32_t output_point_size_index; struct qreg undef; enum qstage stage; diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c index 4472efd..a327c7f 100644 --- a/src/gallium/drivers/vc4/vc4_screen.c +++ b/src/gallium/drivers/vc4/vc4_screen.c @@ -243,7 +243,8 @@ vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param) case PIPE_CAPF_MAX_POINT_WIDTH: case PIPE_CAPF_MAX_POINT_WIDTH_AA: - return 8192.0f; + return 512.0f; + case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: return 0.0f; case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c index 81dac21..5f5eee8 100644 --- a/src/gallium/drivers/vc4/vc4_state.c +++ b/src/gallium/drivers/vc4/vc4_state.c @@ -102,8 +102,10 @@ vc4_create_rasterizer_state(struct pipe_context *pctx, if (!(cso->cull_face & PIPE_FACE_BACK)) so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_BACK; - /* XXX: per_vertex */ - so->point_size = cso->point_size; + /* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835, + * BCM21553). + */ + so->point_size = MAX2(cso->point_size, .125); if (cso->front_ccw) so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES;