From: blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Mon, 10 Dec 2007 19:58:20 +0000 (+0000)
Subject:  Add ASIs (Robert Reif)
X-Git-Tag: TizenStudio_2.0_p2.3~12420
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=666c87aa3b91298ab3b57da6c2ad63b526703b40;p=sdk%2Femulator%2Fqemu.git

 Add ASIs (Robert Reif)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3801 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index a71c9da..b711c62 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -411,6 +411,9 @@ void helper_ld_asi(int asi, int size, int sign)
             break;
         }
         break;
+    case 0x39: /* data cache diagnostic register */
+        ret = 0;
+        break;
     case 0x21 ... 0x2d: /* MMU passthrough, unassigned */
     default:
         do_unassigned_access(T0, 0, 0, 1);
@@ -703,9 +706,13 @@ void helper_st_asi(int asi, int size)
             }
         }
         return;
-    case 0x31: /* Ross RT620 I-cache flush */
+    case 0x30: /* store buffer tags */
+    case 0x31: /* store buffer data or Ross RT620 I-cache flush */
+    case 0x32: /* store buffer control */
     case 0x36: /* I-cache flash clear */
     case 0x37: /* D-cache flash clear */
+    case 0x38: /* breakpoint diagnostics */
+    case 0x4c: /* breakpoint action */
         break;
     case 9: /* Supervisor code access, XXX */
     case 0x21 ... 0x2d: /* MMU passthrough, unassigned */