From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 20 Jan 2020 12:20:07 +0000 (+0200)
Subject: arm: mvebu: clearfog: enable both DDR clocks
X-Git-Tag: v2020.10~403^2~8
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=66646fa89365594999af710a9885a6d5d7a0f7e8;p=platform%2Fkernel%2Fu-boot.git

arm: mvebu: clearfog: enable both DDR clocks

Enabled both DDR clock signals to support Clearfog variants (currently,
Clearfog GTR) that need both clocks.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---

diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 03724fe..8b63811 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -68,7 +68,10 @@ static struct mv_ddr_topology_map board_topology_map = {
 	BUS_MASK_32BIT,			/* Busses mask */
 	MV_DDR_CFG_DEFAULT,		/* ddr configuration data source */
 	{ {0} },			/* raw spd data */
-	{0}				/* timing parameters */
+	{0},				/* timing parameters */
+	{ {0} },			/* electrical configuration */
+	{0,},				/* electrical parameters */
+	0x3,				/* clock enable mask */
 };
 
 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)