From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Tue, 11 Sep 2012 08:28:59 +0000 (+0300)
Subject: Merge branch 'fbdev-for-linus' of git://github.com/schandinat/linux-2.6
X-Git-Tag: v3.7-rc1~48^2~1^2~9
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6659145746bcf01ac650c76e5736c5003c2db230;p=platform%2Fkernel%2Flinux-3.10.git

Merge branch 'fbdev-for-linus' of git://github.com/schandinat/linux-2.6

Merge omapfb and OMAP SDI fixes:

* OMAPFB: fix framebuffer console colors
* OMAPDSS: Fix SDI PLL locking

Conflicts:
	drivers/video/omap2/dss/sdi.c
---

6659145746bcf01ac650c76e5736c5003c2db230
diff --cc drivers/video/omap2/dss/sdi.c
index c87e07e,f43bfe1..66c8de4
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@@ -107,8 -105,21 +107,21 @@@ int omapdss_sdi_display_enable(struct o
  
  	sdi_config_lcd_manager(dssdev);
  
- 	dss_sdi_init(sdi.datapairs);
+ 	/*
+ 	 * LCLK and PCLK divisors are located in shadow registers, and we
+ 	 * normally write them to DISPC registers when enabling the output.
+ 	 * However, SDI uses pck-free as source clock for its PLL, and pck-free
+ 	 * is affected by the divisors. And as we need the PLL before enabling
+ 	 * the output, we need to write the divisors early.
+ 	 *
+ 	 * It seems just writing to the DISPC register is enough, and we don't
+ 	 * need to care about the shadow register mechanism for pck-free. The
+ 	 * exact reason for this is unknown.
+ 	 */
+ 	dispc_mgr_set_clock_div(dssdev->manager->id,
+ 			&sdi.mgr_config.clock_info);
  
 -	dss_sdi_init(dssdev->phy.sdi.datapairs);
++	dss_sdi_init(sdi.datapairs);
  	r = dss_sdi_enable();
  	if (r)
  		goto err_sdi_enable;