From: Sjoerd Meijer <sjoerd.meijer@arm.com>
Date: Thu, 17 Sep 2020 07:47:39 +0000 (+0100)
Subject: [Lint] Add check for intrinsic get.active.lane.mask
X-Git-Tag: llvmorg-13-init~11777
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6637d72ddd3cf4cf3a7e6dfc227a86999137badb;p=platform%2Fupstream%2Fllvm.git

[Lint] Add check for intrinsic get.active.lane.mask

As @efriedma pointed out in D86301, this "not equal to 0 check" of
get.active.lane.mask's second operand needs to live here in Lint and not the
Verifier.

Differential Revision: https://reviews.llvm.org/D87228
---

diff --git a/llvm/lib/Analysis/Lint.cpp b/llvm/lib/Analysis/Lint.cpp
index 04e04a8..75b8f31 100644
--- a/llvm/lib/Analysis/Lint.cpp
+++ b/llvm/lib/Analysis/Lint.cpp
@@ -365,6 +365,11 @@ void Lint::visitCallBase(CallBase &I) {
       visitMemoryReference(I, I.getArgOperand(0), MemoryLocation::UnknownSize,
                            None, nullptr, MemRef::Read | MemRef::Write);
       break;
+    case Intrinsic::get_active_lane_mask:
+      if (auto *TripCount = dyn_cast<ConstantInt>(I.getArgOperand(1)))
+        Assert(!TripCount->isZero(), "get_active_lane_mask: operand #2 "
+               "must be greater than 0", &I);
+      break;
     }
 }
 
diff --git a/llvm/test/Analysis/Lint/get-active-lane-mask.ll b/llvm/test/Analysis/Lint/get-active-lane-mask.ll
new file mode 100644
index 0000000..4ee344a
--- /dev/null
+++ b/llvm/test/Analysis/Lint/get-active-lane-mask.ll
@@ -0,0 +1,39 @@
+; RUN: opt -lint -disable-output < %s 2>&1 | FileCheck %s
+
+define <4 x i1> @t1(i32 %IV) {
+;
+; CHECK:      get_active_lane_mask: operand #2 must be greater than 0
+; CHECK-NEXT: %res = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %IV, i32 0)
+;
+  %res = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %IV, i32 0)
+  ret <4 x i1> %res
+}
+
+define <4 x i1> @t2(i32 %IV) {
+;
+; CHECK-NOT: get_active_lane_mask
+; CHECK-NOT: call <4 x i1> @llvm.get.active.lane.mask
+;
+  %res = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %IV, i32 1)
+  ret <4 x i1> %res
+}
+
+define <4 x i1> @t3(i32 %IV) {
+;
+; CHECK-NOT: get_active_lane_mask
+; CHECK-NOT: call <4 x i1> @llvm.get.active.lane.mask
+;
+  %res = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %IV, i32 -1)
+  ret <4 x i1> %res
+}
+
+define <4 x i1> @t4(i32 %IV, i32 %TC) {
+;
+; CHECK-NOT: get_active_lane_mask
+; CHECK-NOT: call <4 x i1> @llvm.get.active.lane.mask
+;
+  %res = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %IV, i32 %TC)
+  ret <4 x i1> %res
+}
+
+declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)