From: Ben Ashbaugh <ben.ashbaugh@intel.com>
Date: Wed, 23 Jun 2021 22:54:12 +0000 (-0700)
Subject: add support for SPV_KHR_bit_instructions
X-Git-Tag: upstream/sdk-1.2.198.0~22^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6553701d390d7848bd52b115f445601e1d20a83e;p=platform%2Fupstream%2FSPIRV-Headers.git

add support for SPV_KHR_bit_instructions
---

diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index 04eb87e..10cafc4 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -2157,7 +2157,7 @@
         { "kind" : "IdRef",        "name" : "'Offset'" },
         { "kind" : "IdRef",        "name" : "'Count'" }
       ],
-      "capabilities" : [ "Shader" ]
+      "capabilities" : [ "Shader", "BitInstructions" ]
     },
     {
       "opname" : "OpBitFieldSExtract",
@@ -2170,7 +2170,7 @@
         { "kind" : "IdRef",        "name" : "'Offset'" },
         { "kind" : "IdRef",        "name" : "'Count'" }
       ],
-      "capabilities" : [ "Shader" ]
+      "capabilities" : [ "Shader", "BitInstructions" ]
     },
     {
       "opname" : "OpBitFieldUExtract",
@@ -2183,7 +2183,7 @@
         { "kind" : "IdRef",        "name" : "'Offset'" },
         { "kind" : "IdRef",        "name" : "'Count'" }
       ],
-      "capabilities" : [ "Shader" ]
+      "capabilities" : [ "Shader", "BitInstructions" ]
     },
     {
       "opname" : "OpBitReverse",
@@ -2194,7 +2194,7 @@
         { "kind" : "IdResult" },
         { "kind" : "IdRef",        "name" : "'Base'" }
       ],
-      "capabilities" : [ "Shader" ]
+      "capabilities" : [ "Shader", "BitInstructions" ]
     },
     {
       "opname" : "OpBitCount",
@@ -13402,6 +13402,12 @@
           "version" : "None"
         },
         {
+          "enumerant" : "BitInstructions",
+          "value" : 6025,
+          "extensions" : [ "SPV_KHR_bit_instructions" ],
+          "version" : "None"
+        },
+        {
           "enumerant" : "AtomicFloat32AddEXT",
           "value" : 6033,
           "capabilities" : [ "Shader" ],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index f2d8aaa..a44598d 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -1049,6 +1049,7 @@ namespace Spv
             DotProductInput4x8BitKHR = 6017,
             DotProductInput4x8BitPackedKHR = 6018,
             DotProductKHR = 6019,
+            BitInstructions = 6025,
             AtomicFloat32AddEXT = 6033,
             AtomicFloat64AddEXT = 6034,
             LongConstantCompositeINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index 68e9a9a..f86b019 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -1049,6 +1049,7 @@ typedef enum SpvCapability_ {
     SpvCapabilityDotProductInput4x8BitKHR = 6017,
     SpvCapabilityDotProductInput4x8BitPackedKHR = 6018,
     SpvCapabilityDotProductKHR = 6019,
+    SpvCapabilityBitInstructions = 6025,
     SpvCapabilityAtomicFloat32AddEXT = 6033,
     SpvCapabilityAtomicFloat64AddEXT = 6034,
     SpvCapabilityLongConstantCompositeINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index 098ab39..2bacf83 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -1045,6 +1045,7 @@ enum Capability {
     CapabilityDotProductInput4x8BitKHR = 6017,
     CapabilityDotProductInput4x8BitPackedKHR = 6018,
     CapabilityDotProductKHR = 6019,
+    CapabilityBitInstructions = 6025,
     CapabilityAtomicFloat32AddEXT = 6033,
     CapabilityAtomicFloat64AddEXT = 6034,
     CapabilityLongConstantCompositeINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index 8bfd57f..c98eb9d 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -1045,6 +1045,7 @@ enum class Capability : unsigned {
     DotProductInput4x8BitKHR = 6017,
     DotProductInput4x8BitPackedKHR = 6018,
     DotProductKHR = 6019,
+    BitInstructions = 6025,
     AtomicFloat32AddEXT = 6033,
     AtomicFloat64AddEXT = 6034,
     LongConstantCompositeINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index f4f13bc..b09c84a 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -1032,6 +1032,7 @@
                     "DotProductInput4x8BitKHR": 6017,
                     "DotProductInput4x8BitPackedKHR": 6018,
                     "DotProductKHR": 6019,
+                    "BitInstructions": 6025,
                     "AtomicFloat32AddEXT": 6033,
                     "AtomicFloat64AddEXT": 6034,
                     "LongConstantCompositeINTEL": 6089,
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index 9f05c99..dcc15ac 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -1007,6 +1007,7 @@ spv = {
         DotProductInput4x8BitKHR = 6017,
         DotProductInput4x8BitPackedKHR = 6018,
         DotProductKHR = 6019,
+        BitInstructions = 6025,
         AtomicFloat32AddEXT = 6033,
         AtomicFloat64AddEXT = 6034,
         LongConstantCompositeINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index fbef918..2f7870d 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -1007,6 +1007,7 @@ spv = {
         'DotProductInput4x8BitKHR' : 6017,
         'DotProductInput4x8BitPackedKHR' : 6018,
         'DotProductKHR' : 6019,
+        'BitInstructions' : 6025,
         'AtomicFloat32AddEXT' : 6033,
         'AtomicFloat64AddEXT' : 6034,
         'LongConstantCompositeINTEL' : 6089,
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index 65ea536..79e9e85 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -1052,6 +1052,7 @@ enum Capability : uint
     DotProductInput4x8BitKHR = 6017,
     DotProductInput4x8BitPackedKHR = 6018,
     DotProductKHR = 6019,
+    BitInstructions = 6025,
     AtomicFloat32AddEXT = 6033,
     AtomicFloat64AddEXT = 6034,
     LongConstantCompositeINTEL = 6089,