From: Max Filippov <jcmvbkbc@gmail.com>
Date: Mon, 10 Feb 2014 05:16:33 +0000 (+0400)
Subject: target-xtensa: add RRRI4 opcode format fields
X-Git-Tag: Tizen_Studio_1.3_Release_p2.3.1~386^2~42^2~154^2~7
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6502668237a27985dd386c6e42b46e8977b4f2c0;p=sdk%2Femulator%2Fqemu.git

target-xtensa: add RRRI4 opcode format fields

This encoding is used by cache instructions.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---

diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 2d2df33115..355e75e0be 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -922,6 +922,15 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
 #define RRRN_S RRR_S
 #define RRRN_T RRR_T
 
+#define RRI4_R RRR_R
+#define RRI4_S RRR_S
+#define RRI4_T RRR_T
+#ifdef TARGET_WORDS_BIGENDIAN
+#define RRI4_IMM4 ((b2) & 0xf)
+#else
+#define RRI4_IMM4 (((b2) & 0xf0) >> 4)
+#endif
+
 #define RRI8_R RRR_R
 #define RRI8_S RRR_S
 #define RRI8_T RRR_T