From: Anthony Green <green@moxielogic.com>
Date: Sat, 27 Dec 2014 23:37:58 +0000 (-0500)
Subject: Update for moxie ISA changes
X-Git-Tag: gdb-7.9.0-release~212
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6441e6db4abe6043dc81acfeeb6a7bd7124376f7;p=external%2Fbinutils.git

Update for moxie ISA changes
---

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index d7373cd..30ec8ab 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,11 @@
+2014-12-27  Anthony Green  <green@moxielogic.com>
+
+	* moxie-tdep.c (moxie_software_single_step): ldo/sto instructions
+	are 32 bits, not 48.  Update comments for various instructions.
+	(moxie_process_record): Update for new shorter ldo/sto
+	instructions.  Add support for sex, zex, umul.x and mul.x
+	instructions.  Update comments for various instructions.
+
 2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	* arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of
diff --git a/gdb/moxie-tdep.c b/gdb/moxie-tdep.c
index 7926927..88db4a2 100644
--- a/gdb/moxie-tdep.c
+++ b/gdb/moxie-tdep.c
@@ -370,7 +370,7 @@ moxie_software_single_step (struct frame_info *frame)
       switch (opcode)
 	{
 	  /* 16-bit instructions.  */
-	case 0x00: /* nop */
+	case 0x00: /* bad */
 	case 0x02: /* mov (register-to-register) */
 	case 0x05: /* add.l */
 	case 0x06: /* push */
@@ -378,13 +378,13 @@ moxie_software_single_step (struct frame_info *frame)
 	case 0x0a: /* ld.l (register indirect) */
 	case 0x0b: /* st.l */
 	case 0x0e: /* cmp */
-	case 0x0f:
-	case 0x10:
-	case 0x11:
-	case 0x12:
-	case 0x13:
-	case 0x14:
-	case 0x15:
+	case 0x0f: /* nop */
+	case 0x10: /* sex.b */
+	case 0x11: /* sex.s */
+	case 0x12: /* zex.b */
+	case 0x13: /* zex.s */
+	case 0x14: /* umul.x */
+	case 0x15: /* mul.x */
 	case 0x16:
 	case 0x17:
 	case 0x18:
@@ -409,22 +409,26 @@ moxie_software_single_step (struct frame_info *frame)
 	  insert_single_step_breakpoint (gdbarch, aspace, addr + 2);
 	  break;
 
+	  /* 32-bit instructions.  */
+	case 0x0c: /* ldo.l */
+	case 0x0d: /* sto.l */
+	case 0x36: /* ldo.b */
+	case 0x37: /* sto.b */
+	case 0x38: /* ldo.s */
+	case 0x39: /* sto.s */
+	  insert_single_step_breakpoint (gdbarch, aspace, addr + 4);
+	  break;
+
 	  /* 48-bit instructions.  */
 	case 0x01: /* ldi.l (immediate) */
 	case 0x08: /* lda.l */
 	case 0x09: /* sta.l */
-	case 0x0c: /* ldo.l */
-	case 0x0d: /* sto.l */
 	case 0x1b: /* ldi.b (immediate) */
 	case 0x1d: /* lda.b */
 	case 0x1f: /* sta.b */
 	case 0x20: /* ldi.s (immediate) */
 	case 0x22: /* lda.s */
 	case 0x24: /* sta.s */
-	case 0x36: /* ldo.b */
-	case 0x37: /* sto.b */
-	case 0x38: /* ldo.s */
-	case 0x39: /* sto.s */
 	  insert_single_step_breakpoint (gdbarch, aspace, addr + 6);
 	  break;
 
@@ -857,8 +861,8 @@ moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
 	case 0x0d: /* sto.l */
 	  {
 	    int reg = (inst >> 4) & 0xf;
-	    uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
-							      byte_order);
+	    uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
+							       byte_order)) << 16 ) >> 16;
 	    regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 	    tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, 
 					       4, byte_order);
@@ -873,13 +877,23 @@ moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
 	      return -1;
 	  }
 	  break;
-	case 0x0f:
-	case 0x10:
-	case 0x11:
-	case 0x12:
-	case 0x13:
-	case 0x14:
-	case 0x15:
+	case 0x0f: /* nop */
+	  {
+	    /* Do nothing.  */
+	    break;
+	  }
+	case 0x10: /* sex.b */
+	case 0x11: /* sex.s */
+	case 0x12: /* zex.b */
+	case 0x13: /* zex.s */
+	case 0x14: /* umul.x */
+	case 0x15: /* mul.x */
+	  {
+	    int reg = (inst >> 4) & 0xf;
+	    if (record_full_arch_list_add_reg (regcache, reg))
+	      return -1;
+	  }
+	  break;
 	case 0x16:
 	case 0x17:
 	case 0x18:
@@ -965,13 +979,13 @@ moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
 	case 0x26: /* and */
 	case 0x27: /* lshr */
 	case 0x28: /* ashl */
-	case 0x29: /* sub.l */
+	case 0x29: /* sub */
 	case 0x2a: /* neg */
 	case 0x2b: /* or */
 	case 0x2c: /* not */
 	case 0x2d: /* ashr */
 	case 0x2e: /* xor */
-	case 0x2f: /* mul.l */
+	case 0x2f: /* mul */
 	  {
 	    int reg = (inst >> 4) & 0xf;
 	    if (record_full_arch_list_add_reg (regcache, reg))
@@ -1052,8 +1066,8 @@ moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
 	case 0x37: /* sto.b */
 	  {
 	    int reg = (inst >> 4) & 0xf;
-	    uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
-							      byte_order);
+	    uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
+							       byte_order)) << 16 ) >> 16;
 	    regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 	    tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, 
 					       4, byte_order);
@@ -1072,8 +1086,8 @@ moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
 	case 0x39: /* sto.s */
 	  {
 	    int reg = (inst >> 4) & 0xf;
-	    uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
-							      byte_order);
+	    uint32_t offset = (((int16_t) moxie_process_readu (addr+2, buf, 2,
+							       byte_order)) << 16 ) >> 16;
 	    regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 	    tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, 
 					       4, byte_order);