From: Kazu Hirata <kazu@google.com>
Date: Tue, 14 Feb 2023 04:16:48 +0000 (-0800)
Subject: [RISCV] Use llvm::rotl (NFC)
X-Git-Tag: upstream/17.0.6~17622
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=639b7865a67f886ca9d7b994d577236a6957734c;p=platform%2Fupstream%2Fllvm.git

[RISCV] Use llvm::rotl (NFC)
---

diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
index 5790872..f4e227c 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
@@ -358,8 +358,7 @@ InstSeq generateInstSeq(int64_t Val, const FeatureBitset &ActiveFeatures) {
                          ActiveFeatures[RISCV::FeatureVendorXTHeadBb])) {
     if (unsigned Rotate = extractRotateInfo(Val)) {
       RISCVMatInt::InstSeq TmpSeq;
-      uint64_t NegImm12 =
-          ((uint64_t)Val >> (64 - Rotate)) | ((uint64_t)Val << Rotate);
+      uint64_t NegImm12 = llvm::rotl<uint64_t>(Val, Rotate);
       assert(isInt<12>(NegImm12));
       TmpSeq.emplace_back(RISCV::ADDI, NegImm12);
       TmpSeq.emplace_back(ActiveFeatures[RISCV::FeatureStdExtZbb]