From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 26 Nov 2018 17:02:01 +0000 (+0000)
Subject: AMDGPU: Only add implicit super-reg def for first subreg
X-Git-Tag: llvmorg-8.0.0-rc1~3601
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6384d9ea313331b26cd2f0b250affef3bb3cfb41;p=platform%2Fupstream%2Fllvm.git

AMDGPU: Only add implicit super-reg def for first subreg

llvm-svn: 347572
---

diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index 669a60f..ddb2889 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -901,7 +901,7 @@ bool SIRegisterInfo::restoreSGPR(MachineBasicBlock::iterator MI,
         .addImm(0)                        // glc
         .addMemOperand(MMO);
 
-      if (NumSubRegs > 1)
+      if (NumSubRegs > 1 && i == 0)
         MIB.addReg(SuperReg, RegState::ImplicitDefine);
 
       continue;
@@ -915,7 +915,7 @@ bool SIRegisterInfo::restoreSGPR(MachineBasicBlock::iterator MI,
         .addReg(Spill.VGPR)
         .addImm(Spill.Lane);
 
-      if (NumSubRegs > 1)
+      if (NumSubRegs > 1 && i == 0)
         MIB.addReg(SuperReg, RegState::ImplicitDefine);
     } else {
       if (OnlyToVGPR)