From: Alexey Bataev <a.bataev@outlook.com>
Date: Fri, 26 Nov 2021 13:51:51 +0000 (-0800)
Subject: [SLP][NFC]Add a test for gathered instructions in loop, NFC.
X-Git-Tag: upstream/15.0.7~24717
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=6263982172b8ad45f41e9b06cb005e1a8fd6deef;p=platform%2Fupstream%2Fllvm.git

[SLP][NFC]Add a test for gathered instructions in loop, NFC.
---

diff --git a/llvm/test/Transforms/SLPVectorizer/X86/gather-move-out-of-loop.ll b/llvm/test/Transforms/SLPVectorizer/X86/gather-move-out-of-loop.ll
new file mode 100644
index 0000000..fb5275e
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/gather-move-out-of-loop.ll
@@ -0,0 +1,43 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -slp-vectorizer -slp-threshold=-100 -mtriple=x86_64-w64-windows-gnu < %s | FileCheck %s
+
+define void @test(i16 %0) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  for.body92.preheader:
+; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x i16> <i16 0, i16 poison>, i16 [[TMP0:%.*]], i32 1
+; CHECK-NEXT:    br label [[FOR_BODY92:%.*]]
+; CHECK:       for.body92:
+; CHECK-NEXT:    [[SUM_MVR_I:%.*]] = getelementptr i32, i32* undef, i32 0
+; CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i16> [[TMP1]] to <2 x i32>
+; CHECK-NEXT:    [[TMP3:%.*]] = zext <2 x i16> [[TMP1]] to <2 x i32>
+; CHECK-NEXT:    [[TMP4:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> [[TMP3]], <2 x i32> <i32 0, i32 3>
+; CHECK-NEXT:    [[SUM_MVR_ABS_I:%.*]] = getelementptr i32, i32* undef, i32 2
+; CHECK-NEXT:    [[SUM_MVC_I:%.*]] = getelementptr i32, i32* undef, i32 1
+; CHECK-NEXT:    [[SUM_MVC_ABS_I:%.*]] = getelementptr i32, i32* undef, i32 3
+; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <2 x i32> [[TMP4]], <2 x i32> poison, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
+; CHECK-NEXT:    [[TMP6:%.*]] = shufflevector <4 x i32> <i32 poison, i32 0, i32 poison, i32 0>, <4 x i32> [[TMP5]], <4 x i32> <i32 4, i32 1, i32 6, i32 3>
+; CHECK-NEXT:    [[TMP7:%.*]] = add nsw <4 x i32> zeroinitializer, [[TMP6]]
+; CHECK-NEXT:    [[TMP8:%.*]] = bitcast i32* [[SUM_MVR_I]] to <4 x i32>*
+; CHECK-NEXT:    store <4 x i32> [[TMP7]], <4 x i32>* [[TMP8]], align 8
+; CHECK-NEXT:    br label [[FOR_BODY92]]
+;
+for.body92.preheader:
+  br label %for.body92
+
+for.body92:
+  %conv177.i = sext i16 0 to i32
+  %sum_mvr.i = getelementptr i32, i32* undef, i32 0
+  %add178.i = add nsw i32 0, %conv177.i
+  store i32 %add178.i, i32* %sum_mvr.i, align 8
+  %1 = zext i16 %0 to i32
+  %sum_mvr_abs.i = getelementptr i32, i32* undef, i32 2
+  %add182.i = add nsw i32 0, %1
+  store i32 %add182.i, i32* %sum_mvr_abs.i, align 8
+  %sum_mvc.i = getelementptr i32, i32* undef, i32 1
+  %add184.i = add nsw i32 0, 0
+  store i32 %add184.i, i32* %sum_mvc.i, align 4
+  %sum_mvc_abs.i = getelementptr i32, i32* undef, i32 3
+  %add188.i = add nsw i32 0, 0
+  store i32 %add188.i, i32* %sum_mvc_abs.i, align 4
+  br label %for.body92
+}