From: York Sun <york.sun@nxp.com>
Date: Tue, 26 Jun 2018 21:26:02 +0000 (-0700)
Subject: armv8: layerscape: Enabled I-cache for SPL boot
X-Git-Tag: v2018.09-rc1~22^2~11
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=61ab8aac608a35d814b1b4e17712475ebeb20ccb;p=platform%2Fkernel%2Fu-boot.git

armv8: layerscape: Enabled I-cache for SPL boot

Enable I-cache for SPL boot to boost performance. Earlier MMU was
enabled only for LS2080A and has since been dropped by commit
f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build").

Signed-off-by: York Sun <york.sun@nxp.com>
---

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index dba4b40..f1d6fd6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -52,6 +52,7 @@ void spl_board_init(void)
 
 void board_init_f(ulong dummy)
 {
+	icache_enable();
 	/* Clear global data */
 	memset((void *)gd, 0, sizeof(gd_t));
 	board_early_init_f();