From: Krzysztof Parzyszek <kparzysz@codeaurora.org>
Date: Thu, 11 Aug 2016 18:15:16 +0000 (+0000)
Subject: [Hexagon] Skip byval arguments when checking parameter attributes
X-Git-Tag: llvmorg-4.0.0-rc1~12721
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=60f0b514855219a13a9b5929ed6b7ee53e8afb3e;p=platform%2Fupstream%2Fllvm.git

[Hexagon] Skip byval arguments when checking parameter attributes

From the point of view of register assignment, byval parameters are
ignored: a byval parameter is not going to be assigned to a register,
and it will not affect the assignments of subsequent parameters.
When matching registers with parameters in the bit tracker, make sure
to skip byval parameters before advancing the registers.

llvm-svn: 278375
---

diff --git a/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp b/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
index 25a8da7..1f45acc 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
@@ -60,13 +60,15 @@ HexagonEvaluator::HexagonEvaluator(const HexagonRegisterInfo &tri,
     // Module::AnyPointerSize.
     if (Width == 0 || Width > 64)
       break;
+    AttributeSet Attrs = F.getAttributes();
+    if (Attrs.hasAttribute(AttrIdx, Attribute::ByVal))
+      continue;
     InPhysReg = getNextPhysReg(InPhysReg, Width);
     if (!InPhysReg)
       break;
     InVirtReg = getVirtRegFor(InPhysReg);
     if (!InVirtReg)
       continue;
-    AttributeSet Attrs = F.getAttributes();
     if (Attrs.hasAttribute(AttrIdx, Attribute::SExt))
       VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::SExt, Width)));
     else if (Attrs.hasAttribute(AttrIdx, Attribute::ZExt))
diff --git a/llvm/test/CodeGen/Hexagon/bit-skip-byval.ll b/llvm/test/CodeGen/Hexagon/bit-skip-byval.ll
new file mode 100644
index 0000000..d6c1aad
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/bit-skip-byval.ll
@@ -0,0 +1,11 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+;
+; Either and or zxtb.
+; CHECK: r0 = and(r1, #255)
+
+%struct.t0 = type { i32 }
+
+define i32 @foo(%struct.t0* byval align 8 %s, i8 zeroext %t, i8 %u) #0 {
+  %a = zext i8 %u to i32
+  ret i32 %a
+}