From: Thomas Preud'homme <thomasp@graphcore.ai>
Date: Wed, 24 Mar 2021 17:01:59 +0000 (+0000)
Subject: [NFC][Loads] Add a testcase for TBAA aware FindAvailableLoadedValue
X-Git-Tag: llvmorg-14-init~11380
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=60e12a2279b63058b63cd186910ea23298e1b757;p=platform%2Fupstream%2Fllvm.git

[NFC][Loads] Add a testcase for TBAA aware FindAvailableLoadedValue
(D99206)
---

diff --git a/llvm/test/Transforms/InstCombine/load-no-aliasing.ll b/llvm/test/Transforms/InstCombine/load-no-aliasing.ll
new file mode 100644
index 0000000..4147320
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/load-no-aliasing.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -tbaa -evaluate-aa-metadata -instcombine -S < %s | FileCheck %s
+
+; Check that load to load forwarding works with non aliasing store inbetween.
+define i32 @test_load_store_load_combine(i32*, float*) {
+; CHECK-LABEL: @test_load_store_load_combine(
+; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[TMP0:%.*]], align 4, !tbaa [[TBAA0:![0-9]+]]
+; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[A]] to float
+; CHECK-NEXT:    store float [[F]], float* [[TMP1:%.*]], align 4, !tbaa [[TBAA4:![0-9]+]]
+; CHECK-NEXT:    [[B:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
+; CHECK-NEXT:    ret i32 [[B]]
+;
+  %a = load i32, i32* %0, align 4, !tbaa !0
+  %f = sitofp i32 %a to float
+  store float %f, float* %1, align 4, !tbaa !4
+  %b = load i32, i32* %0, align 4, !tbaa !0
+  ret i32 %b
+}
+
+!0 = !{!1, !1, i64 0}
+!1 = !{!"int", !2, i64 0}
+!2 = !{!"omnipotent char", !3, i64 0}
+!3 = !{!"Simple C++ TBAA"}
+!4 = !{!5, !5, i64 0}
+!5 = !{!"float", !2, i64 0}