From: 谢致邦 (XIE Zhibang) Date: Wed, 4 Jan 2017 13:30:58 +0000 (+0800) Subject: MIPS: Loongson: Merge load addresses X-Git-Tag: v4.19~312^2~22 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=60bc84e227d24fdb1ac2211c574a88ecd7c836a0;p=platform%2Fkernel%2Flinux-rpi.git MIPS: Loongson: Merge load addresses Systems based upon the Loongson 1B & 1C CPUs share the same load address, as do those based upon Loongson 1A. Unify the definition of this load address to reduce duplication & avoid the need for an extra Loongson 1A case in future. [paul.burton@mips.com: Rewrite commit message.] Signed-off-by: 谢致邦 (XIE Zhibang) Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/14927/ Cc: linux-mips@linux-mips.org --- diff --git a/arch/mips/loongson32/Platform b/arch/mips/loongson32/Platform index 90ac8f3..a0dbb3b 100644 --- a/arch/mips/loongson32/Platform +++ b/arch/mips/loongson32/Platform @@ -1,5 +1,4 @@ cflags-$(CONFIG_CPU_LOONGSON1) += -march=mips32 -Wa,--trap platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32 -load-$(CONFIG_LOONGSON1_LS1B) += 0xffffffff80100000 -load-$(CONFIG_LOONGSON1_LS1C) += 0xffffffff80100000 +load-$(CONFIG_CPU_LOONGSON1) += 0xffffffff80100000