From: Randy Vinson <rvinson@mvista.com>
Date: Thu, 12 Oct 2006 20:36:23 +0000 (-0700)
Subject: [POWERPC] Fix IO Window Updates on P2P bridges.
X-Git-Tag: v2.6.19-rc3~153^2~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=60b2a46cd60c54bd6551ddfa01f0aab08ca58a5d;p=profile%2Fivi%2Fkernel-adaptation-intel-automotive.git

[POWERPC] Fix IO Window Updates on P2P bridges.

When update_bridge_base() updates the IO window on a PCI-to-PCI
bridge, it fails to zero the upper 16 bits of the base and limit
registers if the window size is less than 64K.  This fixes it.

Signed-off-by: Paul Mackerras <paulus@samba.org>
---

diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 9b49f86..0d9ff72 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -441,14 +441,14 @@ update_bridge_base(struct pci_bus *bus, int i)
 		end = res->end - off;
 		io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
 		io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
-		if (end > 0xffff) {
-			pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
-					      start >> 16);
-			pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
-					      end >> 16);
+		if (end > 0xffff)
 			io_base_lo |= PCI_IO_RANGE_TYPE_32;
-		} else
+		else
 			io_base_lo |= PCI_IO_RANGE_TYPE_16;
+		pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
+				start >> 16);
+		pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
+				end >> 16);
 		pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
 		pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);