From: Sugar Zhang Date: Mon, 29 Jun 2020 14:05:45 +0000 (+0800) Subject: dmaengine: pl330: Add quirk 'arm,pl330-periph-burst' X-Git-Tag: v5.10.7~1906^2~1^2~46 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5fb9e3a3423313fe6169d5069e471bfdab6e0b79;p=platform%2Fkernel%2Flinux-rpi.git dmaengine: pl330: Add quirk 'arm,pl330-periph-burst' This patch adds the qurik to use burst transfers only for pl330 controller, even for request with a length of 1. Although, the correct way should be: if the peripheral request length is 1, the peripheral should use SINGLE request, and then notify the dmac using SINGLE mode by src/dst_maxburst with 1. For example, on the Rockchip SoCs, all the peripherals can use SINGLE or BURST request by setting GRF registers. it is possible that if these peripheral drivers are used only for Rockchip SoCs. Unfortunately, it's not, such as dw uart, which is used so widely, and we can't set src/dst_maxburst according to the SoCs' specific to compatible with all the other SoCs. So, for convenience, all the peripherals are set as BURST request by default on the Rockchip SoCs. even for request with a length of 1. the current pl330 driver will perform SINGLE transfer if the client's maxburst is 1, which still should be working according to chapter 2.6.6 of datasheet which describe how DMAC performs SINGLE transfers for a BURST request. Unfortunately, it's broken on the Rockchip SoCs, which support only matching transfers, such as BURST transfer for BURST request, SINGLE transfer for SINGLE request. Finally, we add the quirk to specify pl330 to use burst transfers only. Signed-off-by: Sugar Zhang Link: https://lore.kernel.org/r/1593439555-68130-5-git-send-email-sugar.zhang@rock-chips.com Signed-off-by: Vinod Koul --- diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index f1f0176..3be8d46 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -33,7 +33,8 @@ #define PL330_MAX_PERI 32 #define PL330_MAX_BURST 16 -#define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0) +#define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0) +#define PL330_QUIRK_PERIPH_BURST BIT(1) enum pl330_cachectrl { CCTRL0, /* Noncacheable and nonbufferable */ @@ -509,6 +510,10 @@ static struct pl330_of_quirks { { .quirk = "arm,pl330-broken-no-flushp", .id = PL330_QUIRK_BROKEN_NO_FLUSHP, + }, + { + .quirk = "arm,pl330-periph-burst", + .id = PL330_QUIRK_PERIPH_BURST, } }; @@ -1206,6 +1211,9 @@ static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], int off = 0; enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE; + if (pl330->quirks & PL330_QUIRK_PERIPH_BURST) + cond = BURST; + switch (pxs->desc->rqtype) { case DMA_MEM_TO_DEV: /* fall through */