From: Sanjay Patel Date: Tue, 24 Jan 2023 16:34:30 +0000 (-0500) Subject: [InstCombine] regenerate test checks; NFC X-Git-Tag: upstream/17.0.6~19776 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5e32124ec96c91578331075f37828023b9041248;p=platform%2Fupstream%2Fllvm.git [InstCombine] regenerate test checks; NFC Value name propagation improved. --- diff --git a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll index b092b1d..b090e20 100644 --- a/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll +++ b/llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll @@ -19,8 +19,8 @@ define <4 x float> @mload(ptr %f, <4 x i32> %mask) { define <4 x float> @mload_v4f32_cmp(ptr %f, <4 x i32> %src) { ; CHECK-LABEL: @mload_v4f32_cmp( ; CHECK-NEXT: [[ICMP:%.*]] = icmp ne <4 x i32> [[SRC:%.*]], zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[F:%.*]], i32 1, <4 x i1> [[ICMP]], <4 x float> zeroinitializer) -; CHECK-NEXT: ret <4 x float> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[F:%.*]], i32 1, <4 x i1> [[ICMP]], <4 x float> zeroinitializer) +; CHECK-NEXT: ret <4 x float> [[LD]] ; %icmp = icmp ne <4 x i32> %src, zeroinitializer %mask = sext <4 x i1> %icmp to <4 x i32> @@ -63,8 +63,8 @@ define <4 x float> @mload_real_ones(ptr %f) { define <4 x float> @mload_one_one(ptr %f) { ; CHECK-LABEL: @mload_one_one( -; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x float> ) -; CHECK-NEXT: ret <4 x float> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <4 x float> @llvm.masked.load.v4f32.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x float> ) +; CHECK-NEXT: ret <4 x float> [[LD]] ; %ld = tail call <4 x float> @llvm.x86.avx.maskload.ps(ptr %f, <4 x i32> ) ret <4 x float> %ld @@ -74,8 +74,8 @@ define <4 x float> @mload_one_one(ptr %f) { define <2 x double> @mload_one_one_double(ptr %f) { ; CHECK-LABEL: @mload_one_one_double( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0(ptr [[F:%.*]], i32 1, <2 x i1> , <2 x double> ) -; CHECK-NEXT: ret <2 x double> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0(ptr [[F:%.*]], i32 1, <2 x i1> , <2 x double> ) +; CHECK-NEXT: ret <2 x double> [[LD]] ; %ld = tail call <2 x double> @llvm.x86.avx.maskload.pd(ptr %f, <2 x i64> ) ret <2 x double> %ld @@ -85,8 +85,8 @@ define <2 x double> @mload_one_one_double(ptr %f) { define <8 x float> @mload_v8f32(ptr %f) { ; CHECK-LABEL: @mload_v8f32( -; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @llvm.masked.load.v8f32.p0(ptr [[F:%.*]], i32 1, <8 x i1> , <8 x float> ) -; CHECK-NEXT: ret <8 x float> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <8 x float> @llvm.masked.load.v8f32.p0(ptr [[F:%.*]], i32 1, <8 x i1> , <8 x float> ) +; CHECK-NEXT: ret <8 x float> [[LD]] ; %ld = tail call <8 x float> @llvm.x86.avx.maskload.ps.256(ptr %f, <8 x i32> ) ret <8 x float> %ld @@ -97,8 +97,8 @@ define <8 x float> @mload_v8f32_cmp(ptr %f, <8 x float> %src0, <8 x float> %src1 ; CHECK-NEXT: [[ICMP0:%.*]] = fcmp one <8 x float> [[SRC0:%.*]], zeroinitializer ; CHECK-NEXT: [[ICMP1:%.*]] = fcmp one <8 x float> [[SRC1:%.*]], zeroinitializer ; CHECK-NEXT: [[MASK1:%.*]] = and <8 x i1> [[ICMP0]], [[ICMP1]] -; CHECK-NEXT: [[TMP1:%.*]] = call <8 x float> @llvm.masked.load.v8f32.p0(ptr [[F:%.*]], i32 1, <8 x i1> [[MASK1]], <8 x float> zeroinitializer) -; CHECK-NEXT: ret <8 x float> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <8 x float> @llvm.masked.load.v8f32.p0(ptr [[F:%.*]], i32 1, <8 x i1> [[MASK1]], <8 x float> zeroinitializer) +; CHECK-NEXT: ret <8 x float> [[LD]] ; %icmp0 = fcmp one <8 x float> %src0, zeroinitializer %icmp1 = fcmp one <8 x float> %src1, zeroinitializer @@ -111,8 +111,8 @@ define <8 x float> @mload_v8f32_cmp(ptr %f, <8 x float> %src0, <8 x float> %src1 define <4 x double> @mload_v4f64(ptr %f) { ; CHECK-LABEL: @mload_v4f64( -; CHECK-NEXT: [[TMP1:%.*]] = call <4 x double> @llvm.masked.load.v4f64.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x double> ) -; CHECK-NEXT: ret <4 x double> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <4 x double> @llvm.masked.load.v4f64.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x double> ) +; CHECK-NEXT: ret <4 x double> [[LD]] ; %ld = tail call <4 x double> @llvm.x86.avx.maskload.pd.256(ptr %f, <4 x i64> ) ret <4 x double> %ld @@ -122,8 +122,8 @@ define <4 x double> @mload_v4f64(ptr %f) { define <4 x i32> @mload_v4i32(ptr %f) { ; CHECK-LABEL: @mload_v4i32( -; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x i32> ) -; CHECK-NEXT: ret <4 x i32> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x i32> ) +; CHECK-NEXT: ret <4 x i32> [[LD]] ; %ld = tail call <4 x i32> @llvm.x86.avx2.maskload.d(ptr %f, <4 x i32> ) ret <4 x i32> %ld @@ -131,8 +131,8 @@ define <4 x i32> @mload_v4i32(ptr %f) { define <2 x i64> @mload_v2i64(ptr %f) { ; CHECK-LABEL: @mload_v2i64( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.masked.load.v2i64.p0(ptr [[F:%.*]], i32 1, <2 x i1> , <2 x i64> ) -; CHECK-NEXT: ret <2 x i64> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <2 x i64> @llvm.masked.load.v2i64.p0(ptr [[F:%.*]], i32 1, <2 x i1> , <2 x i64> ) +; CHECK-NEXT: ret <2 x i64> [[LD]] ; %ld = tail call <2 x i64> @llvm.x86.avx2.maskload.q(ptr %f, <2 x i64> ) ret <2 x i64> %ld @@ -140,8 +140,8 @@ define <2 x i64> @mload_v2i64(ptr %f) { define <8 x i32> @mload_v8i32(ptr %f) { ; CHECK-LABEL: @mload_v8i32( -; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i32> @llvm.masked.load.v8i32.p0(ptr [[F:%.*]], i32 1, <8 x i1> , <8 x i32> ) -; CHECK-NEXT: ret <8 x i32> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <8 x i32> @llvm.masked.load.v8i32.p0(ptr [[F:%.*]], i32 1, <8 x i1> , <8 x i32> ) +; CHECK-NEXT: ret <8 x i32> [[LD]] ; %ld = tail call <8 x i32> @llvm.x86.avx2.maskload.d.256(ptr %f, <8 x i32> ) ret <8 x i32> %ld @@ -149,8 +149,8 @@ define <8 x i32> @mload_v8i32(ptr %f) { define <4 x i64> @mload_v4i64(ptr %f) { ; CHECK-LABEL: @mload_v4i64( -; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.masked.load.v4i64.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x i64> ) -; CHECK-NEXT: ret <4 x i64> [[TMP1]] +; CHECK-NEXT: [[LD:%.*]] = call <4 x i64> @llvm.masked.load.v4i64.p0(ptr [[F:%.*]], i32 1, <4 x i1> , <4 x i64> ) +; CHECK-NEXT: ret <4 x i64> [[LD]] ; %ld = tail call <4 x i64> @llvm.x86.avx2.maskload.q.256(ptr %f, <4 x i64> ) ret <4 x i64> %ld diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll index 3517e5b..d6dcab2 100644 --- a/llvm/test/Transforms/InstCombine/and.ll +++ b/llvm/test/Transforms/InstCombine/and.ll @@ -288,8 +288,8 @@ define i8 @test20(i8 %A) { define i1 @test23(i32 %A) { ; CHECK-LABEL: @test23( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[A:%.*]], 2 -; CHECK-NEXT: ret i1 [[TMP1]] +; CHECK-NEXT: [[D:%.*]] = icmp eq i32 [[A:%.*]], 2 +; CHECK-NEXT: ret i1 [[D]] ; %B = icmp sgt i32 %A, 1 %C = icmp sle i32 %A, 2 @@ -299,8 +299,8 @@ define i1 @test23(i32 %A) { define i1 @test23_logical(i32 %A) { ; CHECK-LABEL: @test23_logical( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[A:%.*]], 2 -; CHECK-NEXT: ret i1 [[TMP1]] +; CHECK-NEXT: [[D:%.*]] = icmp eq i32 [[A:%.*]], 2 +; CHECK-NEXT: ret i1 [[D]] ; %B = icmp sgt i32 %A, 1 %C = icmp sle i32 %A, 2 @@ -310,8 +310,8 @@ define i1 @test23_logical(i32 %A) { define <2 x i1> @test23vec(<2 x i32> %A) { ; CHECK-LABEL: @test23vec( -; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[A:%.*]], -; CHECK-NEXT: ret <2 x i1> [[TMP1]] +; CHECK-NEXT: [[D:%.*]] = icmp eq <2 x i32> [[A:%.*]], +; CHECK-NEXT: ret <2 x i1> [[D]] ; %B = icmp sgt <2 x i32> %A, %C = icmp sle <2 x i32> %A, @@ -321,8 +321,8 @@ define <2 x i1> @test23vec(<2 x i32> %A) { define i1 @test24(i32 %A) { ; CHECK-LABEL: @test24( -; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], 2 -; CHECK-NEXT: ret i1 [[TMP1]] +; CHECK-NEXT: [[D:%.*]] = icmp sgt i32 [[A:%.*]], 2 +; CHECK-NEXT: ret i1 [[D]] ; %B = icmp sgt i32 %A, 1 %C = icmp ne i32 %A, 2 @@ -333,8 +333,8 @@ define i1 @test24(i32 %A) { define i1 @test24_logical(i32 %A) { ; CHECK-LABEL: @test24_logical( -; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], 2 -; CHECK-NEXT: ret i1 [[TMP1]] +; CHECK-NEXT: [[D:%.*]] = icmp sgt i32 [[A:%.*]], 2 +; CHECK-NEXT: ret i1 [[D]] ; %B = icmp sgt i32 %A, 1 %C = icmp ne i32 %A, 2 @@ -346,8 +346,8 @@ define i1 @test24_logical(i32 %A) { define i1 @test25(i32 %A) { ; CHECK-LABEL: @test25( ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[A:%.*]], -50 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 50 -; CHECK-NEXT: ret i1 [[TMP2]] +; CHECK-NEXT: [[D:%.*]] = icmp ult i32 [[TMP1]], 50 +; CHECK-NEXT: ret i1 [[D]] ; %B = icmp sge i32 %A, 50 %C = icmp slt i32 %A, 100 @@ -358,8 +358,8 @@ define i1 @test25(i32 %A) { define i1 @test25_logical(i32 %A) { ; CHECK-LABEL: @test25_logical( ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[A:%.*]], -50 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 50 -; CHECK-NEXT: ret i1 [[TMP2]] +; CHECK-NEXT: [[D:%.*]] = icmp ult i32 [[TMP1]], 50 +; CHECK-NEXT: ret i1 [[D]] ; %B = icmp sge i32 %A, 50 %C = icmp slt i32 %A, 100 @@ -370,8 +370,8 @@ define i1 @test25_logical(i32 %A) { define <2 x i1> @test25vec(<2 x i32> %A) { ; CHECK-LABEL: @test25vec( ; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[A:%.*]], -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i32> [[TMP1]], -; CHECK-NEXT: ret <2 x i1> [[TMP2]] +; CHECK-NEXT: [[D:%.*]] = icmp ult <2 x i32> [[TMP1]], +; CHECK-NEXT: ret <2 x i1> [[D]] ; %B = icmp sge <2 x i32> %A, %C = icmp slt <2 x i32> %A, diff --git a/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll b/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll index 8fbbc43..64f64a7 100644 --- a/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll @@ -380,8 +380,8 @@ define double @bitcast_extelt4(i128 %A) { define <2 x i32> @test4(i32 %A, i32 %B){ ; CHECK-LABEL: @test4( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i64 1 -; CHECK-NEXT: ret <2 x i32> [[TMP2]] +; CHECK-NEXT: [[T43:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i64 1 +; CHECK-NEXT: ret <2 x i32> [[T43]] ; %t38 = zext i32 %A to i64 %t32 = zext i32 %B to i64 @@ -395,8 +395,8 @@ define <2 x i32> @test4(i32 %A, i32 %B){ define <2 x float> @test5(float %A, float %B) { ; CHECK-LABEL: @test5( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i64 1 -; CHECK-NEXT: ret <2 x float> [[TMP2]] +; CHECK-NEXT: [[T43:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i64 1 +; CHECK-NEXT: ret <2 x float> [[T43]] ; %t37 = bitcast float %A to i32 %t38 = zext i32 %t37 to i64 @@ -410,8 +410,8 @@ define <2 x float> @test5(float %A, float %B) { define <2 x float> @test6(float %A){ ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i64 1 -; CHECK-NEXT: ret <2 x float> [[TMP1]] +; CHECK-NEXT: [[T35:%.*]] = insertelement <2 x float> , float [[A:%.*]], i64 1 +; CHECK-NEXT: ret <2 x float> [[T35]] ; %t23 = bitcast float %A to i32 %t24 = zext i32 %t23 to i64 diff --git a/llvm/test/Transforms/InstCombine/bitcast.ll b/llvm/test/Transforms/InstCombine/bitcast.ll index 7c8ff57..0849aeb 100644 --- a/llvm/test/Transforms/InstCombine/bitcast.ll +++ b/llvm/test/Transforms/InstCombine/bitcast.ll @@ -482,8 +482,8 @@ define double @bitcast_extelt8(<1 x i64> %A) { define <2 x i32> @test4(i32 %A, i32 %B){ ; CHECK-LABEL: @test4( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i64 1 -; CHECK-NEXT: ret <2 x i32> [[TMP2]] +; CHECK-NEXT: [[T43:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[B:%.*]], i64 1 +; CHECK-NEXT: ret <2 x i32> [[T43]] ; %t38 = zext i32 %A to i64 %t32 = zext i32 %B to i64 @@ -497,8 +497,8 @@ define <2 x i32> @test4(i32 %A, i32 %B){ define <2 x float> @test5(float %A, float %B) { ; CHECK-LABEL: @test5( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i64 1 -; CHECK-NEXT: ret <2 x float> [[TMP2]] +; CHECK-NEXT: [[T43:%.*]] = insertelement <2 x float> [[TMP1]], float [[B:%.*]], i64 1 +; CHECK-NEXT: ret <2 x float> [[T43]] ; %t37 = bitcast float %A to i32 %t38 = zext i32 %t37 to i64 @@ -512,8 +512,8 @@ define <2 x float> @test5(float %A, float %B) { define <2 x float> @test6(float %A){ ; CHECK-LABEL: @test6( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> , float [[A:%.*]], i64 1 -; CHECK-NEXT: ret <2 x float> [[TMP1]] +; CHECK-NEXT: [[T35:%.*]] = insertelement <2 x float> , float [[A:%.*]], i64 1 +; CHECK-NEXT: ret <2 x float> [[T35]] ; %t23 = bitcast float %A to i32 %t24 = zext i32 %t23 to i64 diff --git a/llvm/test/Transforms/InstCombine/xor.ll b/llvm/test/Transforms/InstCombine/xor.ll index bb956c0..d217fce 100644 --- a/llvm/test/Transforms/InstCombine/xor.ll +++ b/llvm/test/Transforms/InstCombine/xor.ll @@ -51,8 +51,8 @@ define i32 @test4(i32 %A) { define i32 @test5(i32 %A) { ; CHECK-LABEL: @test5( -; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -124 -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = and i32 [[A:%.*]], -124 +; CHECK-NEXT: ret i32 [[R]] ; %t1 = or i32 %A, 123 %r = xor i32 %t1, 123 @@ -133,8 +133,8 @@ define i8 @test10(i8 %A) { define i8 @test11(i8 %A) { ; CHECK-LABEL: @test11( ; CHECK-NEXT: [[B:%.*]] = and i8 [[A:%.*]], -13 -; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[B]], 8 -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[C:%.*]] = or i8 [[B]], 8 +; CHECK-NEXT: ret i8 [[C]] ; %B = or i8 %A, 12 %C = xor i8 %B, 4 @@ -680,8 +680,8 @@ define i32 @test39(i32 %x) { define i32 @test40(i32 %x, i32 %y) { ; CHECK-LABEL: @test40( ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 [[TMP1]]) -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 [[TMP1]]) +; CHECK-NEXT: ret i32 [[RES]] ; %notx = xor i32 %x, -1 %cmp1 = icmp sgt i32 %notx, %y @@ -693,8 +693,8 @@ define i32 @test40(i32 %x, i32 %y) { define i32 @test41(i32 %x, i32 %y) { ; CHECK-LABEL: @test41( ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[TMP1]]) -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[TMP1]]) +; CHECK-NEXT: ret i32 [[RES]] ; %notx = xor i32 %x, -1 %cmp1 = icmp slt i32 %notx, %y @@ -706,8 +706,8 @@ define i32 @test41(i32 %x, i32 %y) { define i32 @test42(i32 %x, i32 %y) { ; CHECK-LABEL: @test42( ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 [[TMP1]]) -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 [[TMP1]]) +; CHECK-NEXT: ret i32 [[RES]] ; %notx = xor i32 %x, -1 %cmp1 = icmp ugt i32 %notx, %y @@ -719,8 +719,8 @@ define i32 @test42(i32 %x, i32 %y) { define i32 @test43(i32 %x, i32 %y) { ; CHECK-LABEL: @test43( ; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[TMP1]]) -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[TMP1]]) +; CHECK-NEXT: ret i32 [[RES]] ; %notx = xor i32 %x, -1 %cmp1 = icmp ult i32 %notx, %y @@ -773,9 +773,9 @@ define <4 x i32> @test46(<4 x i32> %x) { define i32 @test47(i32 %x, i32 %y, i32 %z) { ; CHECK-LABEL: @test47( ; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1 -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[NOTX]], i32 [[Y:%.*]]) -; CHECK-NEXT: [[UMIN:%.*]] = xor i32 [[TMP1]], -1 -; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP1]], [[Z:%.*]] +; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[NOTX]], i32 [[Y:%.*]]) +; CHECK-NEXT: [[UMIN:%.*]] = xor i32 [[UMAX]], -1 +; CHECK-NEXT: [[ADD:%.*]] = add i32 [[UMAX]], [[Z:%.*]] ; CHECK-NEXT: [[RES:%.*]] = mul i32 [[ADD]], [[UMIN]] ; CHECK-NEXT: ret i32 [[RES]] ; @@ -791,8 +791,8 @@ define i32 @test47(i32 %x, i32 %y, i32 %z) { define i32 @test48(i32 %x) { ; CHECK-LABEL: @test48( ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1 -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 -1) -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[D:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 -1) +; CHECK-NEXT: ret i32 [[D]] ; %a = sub i32 -2, %x %b = icmp sgt i32 %a, 0 @@ -804,8 +804,8 @@ define i32 @test48(i32 %x) { define <2 x i32> @test48vec(<2 x i32> %x) { ; CHECK-LABEL: @test48vec( ; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], -; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[TMP1]], <2 x i32> ) -; CHECK-NEXT: ret <2 x i32> [[TMP2]] +; CHECK-NEXT: [[D:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[TMP1]], <2 x i32> ) +; CHECK-NEXT: ret <2 x i32> [[D]] ; %a = sub <2 x i32> , %x %b = icmp sgt <2 x i32> %a, zeroinitializer @@ -817,8 +817,8 @@ define <2 x i32> @test48vec(<2 x i32> %x) { define i32 @test49(i32 %x) { ; CHECK-LABEL: @test49( ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 1, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 0) -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[D:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 0) +; CHECK-NEXT: ret i32 [[D]] ; %a = add i32 %x, -2 %b = icmp slt i32 %a, -1 @@ -830,8 +830,8 @@ define i32 @test49(i32 %x) { define <2 x i32> @test49vec(<2 x i32> %x) { ; CHECK-LABEL: @test49vec( ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> , [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> zeroinitializer) -; CHECK-NEXT: ret <2 x i32> [[TMP2]] +; CHECK-NEXT: [[D:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> zeroinitializer) +; CHECK-NEXT: ret <2 x i32> [[D]] ; %a = add <2 x i32> %x, %b = icmp slt <2 x i32> %a, @@ -844,8 +844,8 @@ define i32 @test50(i32 %x, i32 %y) { ; CHECK-LABEL: @test50( ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 1, [[X:%.*]] ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[Y:%.*]], 1 -; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 [[TMP2]]) -; CHECK-NEXT: ret i32 [[TMP3]] +; CHECK-NEXT: [[E:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 [[TMP2]]) +; CHECK-NEXT: ret i32 [[E]] ; %a = add i32 %x, -2 %b = sub i32 -2, %y @@ -859,8 +859,8 @@ define <2 x i32> @test50vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @test50vec( ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> , [[X:%.*]] ; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i32> [[Y:%.*]], -; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[TMP2]]) -; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; CHECK-NEXT: [[E:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[TMP2]]) +; CHECK-NEXT: ret <2 x i32> [[E]] ; %a = add <2 x i32> %x, %b = sub <2 x i32> , %y @@ -874,8 +874,8 @@ define i32 @test51(i32 %x, i32 %y) { ; CHECK-LABEL: @test51( ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 -3, [[X:%.*]] ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[Y:%.*]], -3 -; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 [[TMP2]]) -; CHECK-NEXT: ret i32 [[TMP3]] +; CHECK-NEXT: [[E:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 [[TMP2]]) +; CHECK-NEXT: ret i32 [[E]] ; %a = add i32 %x, 2 %b = sub i32 2, %y @@ -889,8 +889,8 @@ define <2 x i32> @test51vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @test51vec( ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> , [[X:%.*]] ; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i32> [[Y:%.*]], -; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[TMP2]]) -; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; CHECK-NEXT: [[E:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[TMP2]]) +; CHECK-NEXT: ret <2 x i32> [[E]] ; %a = add <2 x i32> %x, %b = sub <2 x i32> , %y