From: James Zhu Date: Wed, 12 Dec 2018 19:46:10 +0000 (-0500) Subject: drm/amdgpu/vcn:Always gate vcn block during hw finishing X-Git-Tag: v5.15~7216^2~1^2~34 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5d65cab6c614f95549b19416b2aad824c6d9283a;p=platform%2Fkernel%2Flinux-starfive.git drm/amdgpu/vcn:Always gate vcn block during hw finishing Under Dynamic Power Gate mode, UVD_STATUS needn't be checked. Signed-off-by: James Zhu Acked-by: Leo Liu Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c index 4f83520..7752043 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c @@ -214,7 +214,8 @@ static int vcn_v1_0_hw_fini(void *handle) struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_ring *ring = &adev->vcn.ring_dec; - if (RREG32_SOC15(VCN, 0, mmUVD_STATUS)) + if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) || + RREG32_SOC15(VCN, 0, mmUVD_STATUS)) vcn_v1_0_set_powergating_state(adev, AMD_PG_STATE_GATE); ring->sched.ready = false;