From: Francisco Jerez <currojerez@riseup.net>
Date: Sat, 29 Oct 2022 00:02:13 +0000 (-0700)
Subject: intel/compiler: Run extra fp64 lowering pass on devices that don't support int64.
X-Git-Tag: upstream/23.3.3~17326
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5d4df3ac23bb07743823118a344ce831b102dabf;p=platform%2Fupstream%2Fmesa.git

intel/compiler: Run extra fp64 lowering pass on devices that don't support int64.

In some cases nir_lower_int64 will emit fp64 operations which aren't
natively supported on any Intel hardware (e.g. ftrunc, frem).  An
extra pass of nir_opt_algebraic (for frem) and nir_lower_doubles is
required in order to take care of them.  This fixes several int64
test-cases on MTL hardware.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19390>
---

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 760b661..8cbf39a 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -951,7 +951,10 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
    brw_nir_optimize(nir, compiler, is_scalar, true);
 
    OPT(nir_lower_doubles, softfp64, nir->options->lower_doubles_options);
-   OPT(nir_lower_int64);
+   if (OPT(nir_lower_int64)) {
+      OPT(nir_opt_algebraic);
+      OPT(nir_lower_doubles, softfp64, nir->options->lower_doubles_options);
+   }
 
    OPT(nir_lower_bit_size, lower_bit_size_callback, (void *)compiler);