From: Jani Nikula Date: Tue, 2 Mar 2021 11:03:00 +0000 (+0200) Subject: drm/i915/mso: add splitter state check X-Git-Tag: accepted/tizen/unified/20230118.172025~6402^2~29^2~351 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5bc4fab7e79206926718c3d39cb70cbee22ef4ac;p=platform%2Fkernel%2Flinux-rpi.git drm/i915/mso: add splitter state check For starters, we expect the state to be zero, as we don't enable MSO anywhere. v2: Refer to splitter. Cc: Nischal Varide Reviewed-by: Uma Shankar Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/459a332f3cdce941c57312150872559db68f88c1.1614682842.git.jani.nikula@intel.com --- diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c605d48..7a243a9 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -9339,6 +9339,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(dsc.dsc_split); PIPE_CONF_CHECK_I(dsc.compressed_bpp); + PIPE_CONF_CHECK_BOOL(splitter.enable); + PIPE_CONF_CHECK_I(splitter.link_count); + PIPE_CONF_CHECK_I(splitter.pixel_overlap); + PIPE_CONF_CHECK_I(mst_master_transcoder); PIPE_CONF_CHECK_BOOL(vrr.enable);