From: Andrew Kaylor Date: Tue, 26 Apr 2016 19:46:28 +0000 (+0000) Subject: Add optimization bisect opt-in calls for Hexagon passes X-Git-Tag: llvmorg-3.9.0-rc1~7889 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5b444a21dfa9fad419cf5d832a827818bd23d8cc;p=platform%2Fupstream%2Fllvm.git Add optimization bisect opt-in calls for Hexagon passes Differential Revision: http://reviews.llvm.org/D19509 llvm-svn: 267593 --- diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp index f516be3..a6a9e33 100644 --- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp +++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp @@ -2191,6 +2191,9 @@ bool BitSimplification::processBlock(MachineBasicBlock &B, bool HexagonBitSimplify::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + auto &HST = MF.getSubtarget(); auto &HRI = *HST.getRegisterInfo(); auto &HII = *HST.getInstrInfo(); @@ -2733,6 +2736,9 @@ bool HexagonLoopRescheduling::processLoop(LoopCand &C) { bool HexagonLoopRescheduling::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + auto &HST = MF.getSubtarget(); HII = HST.getInstrInfo(); HRI = HST.getRegisterInfo(); diff --git a/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp b/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp index 7becb49..eb56ae7 100644 --- a/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp @@ -102,6 +102,9 @@ HexagonCFGOptimizer::InvertAndChangeJumpTarget(MachineInstr* MI, bool HexagonCFGOptimizer::runOnMachineFunction(MachineFunction &Fn) { + if (skipFunction(*Fn.getFunction())) + return false; + // Loop over all of the basic blocks. for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end(); MBBb != MBBe; ++MBBb) { diff --git a/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp b/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp index 1609eee..2258f22 100644 --- a/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp +++ b/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp @@ -1268,6 +1268,9 @@ void HexagonCommonGEP::removeDeadCode() { bool HexagonCommonGEP::runOnFunction(Function &F) { + if (skipFunction(F)) + return false; + // For now bail out on C++ exception handling. for (Function::iterator A = F.begin(), Z = F.end(); A != Z; ++A) for (BasicBlock::iterator I = A->begin(), E = A->end(); I != E; ++I) diff --git a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp index e01ccaf..27562b0 100644 --- a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp +++ b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp @@ -1032,6 +1032,9 @@ void HexagonEarlyIfConversion::simplifyFlowGraph(const FlowPattern &FP) { bool HexagonEarlyIfConversion::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + auto &ST = MF.getSubtarget(); TII = ST.getInstrInfo(); TRI = ST.getRegisterInfo(); diff --git a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp index 35185ef..2656ae4 100644 --- a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp +++ b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp @@ -1307,6 +1307,9 @@ bool HexagonExpandCondsets::coalesceSegments(MachineFunction &MF) { bool HexagonExpandCondsets::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + HII = static_cast(MF.getSubtarget().getInstrInfo()); TRI = MF.getSubtarget().getRegisterInfo(); LIS = &getAnalysis(); diff --git a/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp b/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp index f622297..e6037c6 100644 --- a/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp @@ -90,6 +90,8 @@ static bool isHardwareLoop(const MachineInstr *MI) { } bool HexagonFixupHwLoops::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; return fixupLoopInstrs(MF); } diff --git a/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp b/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp index f26e2ff..f46b6d2 100644 --- a/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp +++ b/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp @@ -242,6 +242,9 @@ bool HexagonGenExtract::visitBlock(BasicBlock *B) { bool HexagonGenExtract::runOnFunction(Function &F) { + if (skipFunction(F)) + return false; + DT = &getAnalysis().getDomTree(); bool Changed; diff --git a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp index f04ac38..71d0791 100644 --- a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp +++ b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp @@ -1469,6 +1469,9 @@ bool HexagonGenInsert::removeDeadCode(MachineDomTreeNode *N) { bool HexagonGenInsert::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + bool Timing = OptTiming, TimingDetail = Timing && OptTimingDetail; bool Changed = false; TimerGroup __G("hexinsert"); diff --git a/llvm/lib/Target/Hexagon/HexagonGenMux.cpp b/llvm/lib/Target/Hexagon/HexagonGenMux.cpp index da4c186..fb6bbf7 100644 --- a/llvm/lib/Target/Hexagon/HexagonGenMux.cpp +++ b/llvm/lib/Target/Hexagon/HexagonGenMux.cpp @@ -309,6 +309,8 @@ bool HexagonGenMux::genMuxInBlock(MachineBasicBlock &B) { } bool HexagonGenMux::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; HII = MF.getSubtarget().getInstrInfo(); HRI = MF.getSubtarget().getRegisterInfo(); bool Changed = false; diff --git a/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp b/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp index 58cf1a8..7a3b65a 100644 --- a/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp +++ b/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp @@ -477,6 +477,9 @@ bool HexagonGenPredicate::eliminatePredCopies(MachineFunction &MF) { bool HexagonGenPredicate::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + TII = MF.getSubtarget().getInstrInfo(); TRI = MF.getSubtarget().getRegisterInfo(); MRI = &MF.getRegInfo(); diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp index d20a809..f5a648a 100644 --- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -346,6 +346,8 @@ FunctionPass *llvm::createHexagonHardwareLoops() { bool HexagonHardwareLoops::runOnMachineFunction(MachineFunction &MF) { DEBUG(dbgs() << "********* Hexagon Hardware Loops *********\n"); + if (skipFunction(*MF.getFunction())) + return false; bool Changed = false; diff --git a/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp b/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp index a0e1365..fbc8113 100644 --- a/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp +++ b/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp @@ -394,6 +394,9 @@ bool HexagonNewValueJump::runOnMachineFunction(MachineFunction &MF) { << "********** Function: " << MF.getName() << "\n"); + if (skipFunction(*MF.getFunction())) + return false; + // If we move NewValueJump before register allocation we'll need live variable // analysis here too. diff --git a/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp b/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp index 1723771..7937a79 100644 --- a/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp +++ b/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp @@ -69,6 +69,9 @@ bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { } bool HexagonOptimizeSZextends::runOnFunction(Function &F) { + if (skipFunction(F)) + return false; + unsigned Idx = 1; // Try to optimize sign extends in formal parameters. It's relying on // callee already sign extending the values. I'm not sure if our ABI diff --git a/llvm/lib/Target/Hexagon/HexagonPeephole.cpp b/llvm/lib/Target/Hexagon/HexagonPeephole.cpp index 166efee..6ddd331 100644 --- a/llvm/lib/Target/Hexagon/HexagonPeephole.cpp +++ b/llvm/lib/Target/Hexagon/HexagonPeephole.cpp @@ -112,6 +112,9 @@ INITIALIZE_PASS(HexagonPeephole, "hexagon-peephole", "Hexagon Peephole", false, false) bool HexagonPeephole::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + QII = static_cast(MF.getSubtarget().getInstrInfo()); QRI = MF.getSubtarget().getRegisterInfo(); MRI = &MF.getRegInfo(); diff --git a/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp b/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp index 56e6c6b..d735acf 100644 --- a/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp +++ b/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp @@ -267,6 +267,9 @@ bool HexagonDCE::rewrite(NodeAddr IA, SetVector &Remove) { bool HexagonRDFOpt::runOnMachineFunction(MachineFunction &MF) { + if (skipFunction(*MF.getFunction())) + return false; + if (RDFLimit.getPosition()) { if (RDFCount >= RDFLimit) return false; diff --git a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp index 08690db..62999e5 100644 --- a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp @@ -1163,6 +1163,9 @@ bool HexagonSplitDoubleRegs::runOnMachineFunction(MachineFunction &MF) { DEBUG(dbgs() << "Splitting double registers in function: " << MF.getName() << '\n'); + if (skipFunction(*MF.getFunction())) + return false; + auto &ST = MF.getSubtarget(); TRI = ST.getRegisterInfo(); TII = ST.getInstrInfo(); diff --git a/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp b/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp index b5339ff..54bc3cf 100644 --- a/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp +++ b/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp @@ -594,6 +594,9 @@ bool HexagonStoreWidening::processBasicBlock(MachineBasicBlock &MBB) { bool HexagonStoreWidening::runOnMachineFunction(MachineFunction &MFn) { + if (skipFunction(*MFn.getFunction())) + return false; + MF = &MFn; auto &ST = MFn.getSubtarget(); TII = ST.getInstrInfo(); diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp index a0e8768..4630c98 100644 --- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -170,7 +170,7 @@ static MachineBasicBlock::iterator moveInstrOut(MachineInstr *MI, bool HexagonPacketizer::runOnMachineFunction(MachineFunction &MF) { - if (DisablePacketizer) + if (DisablePacketizer || skipFunction(*MF.getFunction())) return false; HII = MF.getSubtarget().getInstrInfo();