From: david.li Date: Tue, 14 Dec 2021 06:21:27 +0000 (+0800) Subject: [add v4l2 driver && close pcie] X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5ae2dbf72c8d5cbda91283c45809b34456de7e24;p=platform%2Fkernel%2Flinux-starfive.git [add v4l2 driver && close pcie] --- diff --git a/arch/riscv/boot/dts/starfive/starfive_jh7110.dts b/arch/riscv/boot/dts/starfive/starfive_jh7110.dts index 81d1311..b5eed5c 100755 --- a/arch/riscv/boot/dts/starfive/starfive_jh7110.dts +++ b/arch/riscv/boot/dts/starfive/starfive_jh7110.dts @@ -351,7 +351,53 @@ ngpios = <64>; status = "okay"; }; + i2c6: i2c@12060000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0x0 0x12060000 0x0 0x10000>; + interrupt-parent = <&plic>; + interrupts = <51>; + clock-frequency = <100000>; + i2c-sda-hold-time-ns = <300>; + i2c-sda-falling-time-ns = <3000>; + i2c-scl-falling-time-ns = <3000>; + auto_calc_scl_lhcnt; + status = "okay"; + + + + sc2235@30 { + compatible = "sc2235"; + reg = <0x30>; + clocks = <&clk_ext_camera>; + clock-names = "xclk"; + powerdown-gpios = <&gpio 0 0>; + reset-gpios = <&gpio 0 0>; + sc2235-18-gpios = <&gpio 11 0>; + sc2235-15-gpios = <&gpio 12 0>; + sc2235-28-gpios = <&gpio 10 0>; + sc2235-reset-gpios = <&gpio 16 0>; + sc2235-pwdn-gpios = <&gpio 15 0>; + sc2235-esync-gpios = <&gpio 17 0>; + sc2235-oen-gpios = <&gpio 18 0>; + //DOVDD-supply = <&v2v8>; + + port { + /* Parallel bus endpoint */ + sc2235_to_parallel: endpoint { + remote-endpoint = <¶llel_from_sc2235>; + bus-type = <5>; /* Parallel */ + bus-width = <8>; + data-shift = <2>; /* lines 13:6 are used */ + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; + }; i2c0: i2c@10030000 { #address-cells = <1>; #size-cells = <0>; @@ -423,6 +469,43 @@ /*fixed-emmc-driver-type;*/ post-power-on-delay-ms = <200>; }; + vin_sysctl:vin_sysctl@19800000 { + compatible = "starfive,stf-vin"; + reg = <0x0 0x19800000 0x0 0x10000>,//mipi-csi-0 mipi0 + <0x0 0x19810000 0x0 0x10000>,//dom-isp-cfg vclk + <0x0 0x19820000 0x0 0x10000>,//mipirx-dphyapb config vrst + <0x0 0x19830000 0x0 0x10000>,//reserved mipi1 + <0x0 0x19840000 0x0 0x10000>,//dom-isp-syscon sctrl + <0x0 0x19870000 0x0 0x30000>,//ispv1-mini isp0 + <0x0 0x198a0000 0x0 0x30000>,//reserved isp1 + <0x0 0x11800000 0x0 0x10000>,//reserved tclk + <0x0 0x11840000 0x0 0x10000>,//reserved trst + <0x0 0x11858000 0x0 0x10000>,//reserved iopad + <0x0 0x17030000 0x0 0x10000>, //pmu + <0x0 0x13020000 0x0 0x10000>; //sys_crg + reg-names = "mipi0", "vclk", "vrst", "mipi1", "sctrl", "isp0", "isp1", "tclk", "trst", "iopad", "pmu", "syscrg"; + interrupt-parent = <&plic>; + interrupts = <92 87 86>; + // memory-region = <&vin_reserved>; + + ports { + port@3 { + reg = <2>; //dvp sensor + + /* Parallel bus endpoint */ + parallel_from_sc2235: endpoint { + remote-endpoint = <&sc2235_to_parallel>; + bus-type = <5>; /* Parallel */ + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + status = "okay"; + }; + }; + }; + }; jpu: jpu@11900000 { compatible = "starfive,jpu"; reg = <0x0 0x13090000 0x0 0x300>; @@ -551,6 +634,7 @@ <0x0 0x0 0x0 0x2 &plic 0x2>, <0x0 0x0 0x0 0x3 &plic 0x3>, <0x0 0x0 0x0 0x4 &plic 0x4>; + status = "disabled"; }; }; }; diff --git a/arch/riscv/boot/dts/starfive/starfive_jh7110_clk.dtsi b/arch/riscv/boot/dts/starfive/starfive_jh7110_clk.dtsi index fe127b4..a250501 100644 --- a/arch/riscv/boot/dts/starfive/starfive_jh7110_clk.dtsi +++ b/arch/riscv/boot/dts/starfive/starfive_jh7110_clk.dtsi @@ -146,6 +146,11 @@ compatible = "fixed-clock"; clock-frequency = <12288000>; }; + clk_ext_camera: clk-ext-camera { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; canclk: canclk { #clock-cells = <0>; compatible = "fixed-clock"; diff --git a/arch/riscv/configs/starfive_jh7110_defconfig b/arch/riscv/configs/starfive_jh7110_defconfig index 5ee2bc4..73bf65d 100644 --- a/arch/riscv/configs/starfive_jh7110_defconfig +++ b/arch/riscv/configs/starfive_jh7110_defconfig @@ -158,10 +158,14 @@ CONFIG_POWER_RESET_SYSCON_POWEROFF=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y CONFIG_STARFIVE_WATCHDOG=y +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_STF_VIN=y +CONFIG_VIN_SENSOR_SC2235=y CONFIG_DRM=y CONFIG_DRM_VGEM=y CONFIG_DRM_VKMS=y -# CONFIG_DRM_IMG_NULLDISP is not set CONFIG_FB=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_FRAMEBUFFER_CONSOLE=y diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 80321e0..ba2ee8f 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -138,6 +138,17 @@ config VIDEO_STM32_DCMI To compile this driver as a module, choose M here: the module will be called stm32-dcmi. +config VIDEO_STF_VIN + tristate "starfive VIC video in support" + depends on VIDEO_V4L2 && OF + select MEDIA_CONTROLLER + select VIDEOBUF2_DMA_CONTIG + select VIDEO_V4L2_SUBDEV_API + select V4L2_FWNODE + help + To compile this driver as a module, choose M here: the module + will be called stf-vin. + config VIDEO_RENESAS_CEU tristate "Renesas Capture Engine Unit (CEU) driver" depends on VIDEO_DEV && VIDEO_V4L2 @@ -171,6 +182,7 @@ source "drivers/media/platform/xilinx/Kconfig" source "drivers/media/platform/rcar-vin/Kconfig" source "drivers/media/platform/atmel/Kconfig" source "drivers/media/platform/sunxi/Kconfig" +source "drivers/media/platform/starfive/Kconfig" config VIDEO_TI_CAL tristate "TI CAL (Camera Adaptation Layer) driver" diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index 73ce083..57b4202 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -43,6 +43,8 @@ obj-$(CONFIG_VIDEO_STI_DELTA) += sti/delta/ obj-y += stm32/ +obj-y += starfive/ + obj-y += davinci/ obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o diff --git a/drivers/media/platform/starfive/Kconfig b/drivers/media/platform/starfive/Kconfig new file mode 100755 index 0000000..09e35ed --- /dev/null +++ b/drivers/media/platform/starfive/Kconfig @@ -0,0 +1,26 @@ +# +# VIN sensor driver configuration +# +config VIN_SENSOR_OV5640 + bool "VIN SENSOR support OV5640" + depends on VIDEO_STF_VIN + select V4L2_FWNODE + default n + help + Say Y here if you want to have support for VIN sensor OV5640 + +config VIN_SENSOR_SC2235 + bool "VIN SENSOR support SC2235" + depends on VIDEO_STF_VIN + select V4L2_FWNODE + default n + help + Say Y here if you want to have support for VIN sensor SC2235 + +config VIN_SENSOR_OV4689 + bool "VIN SENSOR support OV4689" + depends on VIDEO_STF_VIN + select V4L2_FWNODE + default n + help + Say Y here if you want to have support for VIN sensor OV4689 diff --git a/drivers/media/platform/starfive/Makefile b/drivers/media/platform/starfive/Makefile new file mode 100755 index 0000000..e4e2103 --- /dev/null +++ b/drivers/media/platform/starfive/Makefile @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for RTC class/drivers. +# + +#obj-$(CONFIG_VIN_SENSOR_OV5640) += ov5640_dvp.o +#obj-$(CONFIG_VIN_SENSOR_SC2235) += sc2235.o +#obj-$(CONFIG_VIN_SENSOR_OV4689) += ov4689_mipi.o +#obj-$(CONFIG_VIDEO_STF_VIN) += stf_vin.o stf_event.o stf_isp.o stf_csi.o + +obj-$(CONFIG_VIN_SENSOR_OV5640) += v4l2_driver/ov5640.o +obj-$(CONFIG_VIN_SENSOR_SC2235) += v4l2_driver/sc2235.o +obj-$(CONFIG_VIN_SENSOR_OV4689) += v4l2_driver/ov4689_mipi.o + +obj-$(CONFIG_VIDEO_STF_VIN) += v4l2_driver/stfcamss.o \ + v4l2_driver/stf_event.o \ + v4l2_driver/stf_dvp.o \ + v4l2_driver/stf_csi.o \ + v4l2_driver/stf_csiphy.o \ + v4l2_driver/stf_isp.o \ + v4l2_driver/stf_video.o \ + v4l2_driver/stf_vin.o \ + v4l2_driver/stf_vin_hw_ops.o \ + v4l2_driver/stf_csi_hw_ops.o \ + v4l2_driver/stf_csiphy_hw_ops.o \ + v4l2_driver/stf_isp_hw_ops.o \ + v4l2_driver/stf_dvp_hw_ops.o diff --git a/drivers/media/platform/starfive/v4l2_driver/Readme.txt b/drivers/media/platform/starfive/v4l2_driver/Readme.txt new file mode 100755 index 0000000..f2cad53 --- /dev/null +++ b/drivers/media/platform/starfive/v4l2_driver/Readme.txt @@ -0,0 +1,98 @@ + + +/dev/video0 sensor配置为ov5640的设备节点 +/dev/video1 sensor配置为ov4689(i2c0)的设备节点 +/dev/video2 sensor配置为sc2235/ov4689(i2c2)的设备节点 + +确认conf/sdk_210209_defconfig +CONFIG_VIN_SENSOR_OV5640=y +CONFIG_VIN_SENSOR_SC2235=y +CONFIG_VIN_SENSOR_OV4689=y + + +只支持DPHY的lane0/lane5做clk通道，lane1/2/3/4做数据通道。 + +sensor port 设为okay, 硬件需要接入对应的sensor，否则驱动不能使用。 + +1. ov5640 config dts: + parallel_from_ov5640 port status 设置为okay, sc2235 port status 设为failed. + port@2 { + reg = <2>; // dvp sensor + + /* Parallel bus endpoint */ + parallel_from_ov5640: endpoint { + remote-endpoint = <&ov5640_to_parallel>; + bus-type = <5>; /* Parallel */ + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <1>; + vsync-active = <0>; + pclk-sample = <1>; + sensor-type = <0>; //0:SENSOR_VIN 1:SENSOR_ISP0 2:SENSOR_ISP1 + status = "okay"; + }; + }; + +2. SC2235 config dts: + stf_isp_hw_ops.c: + stf_isp_set_format函数里面注释掉： + // isp_settings = isp_1920_1080_settings; + + parallel_from_sc2235 port status 设置为okay, ov5640/ov4689(i2c2) port status设为failed. + port@3 { + reg = <2>; // dvp sensor + + /* Parallel bus endpoint */ + parallel_from_sc2235: endpoint { + remote-endpoint = <&sc2235_to_parallel>; + bus-type = <5>; /* Parallel */ + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + sensor-type = <2>; //0:SENSOR_VIN 1:SENSOR_ISP0 2:SENSOR_ISP1 + status = "okay"; + }; + }; + +3. i2c0 ov4689 config dts: + csi2rx0_from_ov4689 port status 设置为okay. + port@4 { + reg = <3>; // csi2rx0 sensor + + /* CSI2 bus endpoint */ + csi2rx0_from_ov4689: endpoint { + remote-endpoint = <&ov4689_to_csi2rx0>; + bus-type = <4>; /* MIPI CSI-2 D-PHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + sensor-type = <1>; //0:SENSOR_VIN 1:SENSOR_ISP0 2:SENSOR_ISP1 + csi-dt = <0x2b>; + status = "okay"; + }; + }; + +4. i2c2 ov4689 config dts: + + stf_isp_hw_ops.c: + stf_isp_set_format函数里面346行不要注释掉： + isp_settings = isp_1920_1080_settings; + + csi2rx1_from_ov4689 port status 设置为okay, sc2235 port status 设为failed. + port@5 { + reg = <4>; // csi2rx1 sensor + + /* CSI2 bus endpoint */ + csi2rx1_from_ov4689: endpoint { + remote-endpoint = <&ov4689_to_csi2rx1>; + bus-type = <4>; /* MIPI CSI-2 D-PHY */ + clock-lanes = <5>; + data-lanes = <4 3>; + lane-polarities = <1 1 1>; + sensor-type = <2>; //0:SENSOR_VIN 1:SENSOR_ISP0 2:SENSOR_ISP1 + csi-dt = <0x2b>; + status = "okay"; + }; + }; + diff --git a/drivers/media/platform/starfive/v4l2_driver/ov4689_mipi.c b/drivers/media/platform/starfive/v4l2_driver/ov4689_mipi.c new file mode 100755 index 0000000..1b42d36 --- /dev/null +++ b/drivers/media/platform/starfive/v4l2_driver/ov4689_mipi.c @@ -0,0 +1,2768 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2014-2017 Mentor Graphics Inc. + * Copyright (C) 2021 StarFive Technology Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "stfcamss.h" + + +#define OV4689_LANES 2 + +#define OV4689_LINK_FREQ_500MHZ 500000000LL + +/* min/typical/max system clock (xclk) frequencies */ +#define OV4689_XCLK_MIN 6000000 +#define OV4689_XCLK_MAX 54000000 + +#define OV4689_CHIP_ID (0x4688) + +#define OV4689_CHIP_ID_HIGH_BYTE 0x300a // max should be 0x46 +#define OV4689_CHIP_ID_LOW_BYTE 0x300b // max should be 0x88 +#define OV4689_REG_CHIP_ID 0x300a + +#define OV4689_REG_H_OUTPUT_SIZE 0x3808 +#define OV4689_REG_V_OUTPUT_SIZE 0x380a +#define OV4689_REG_TIMING_HTS 0x380c +#define OV4689_REG_TIMING_VTS 0x380e + +#define OV4689_REG_EXPOSURE_HI 0x3500 +#define OV4689_REG_EXPOSURE_MED 0x3501 +#define OV4689_REG_EXPOSURE_LO 0x3502 +#define OV4689_REG_GAIN_H 0x3507 +#define OV4689_REG_GAIN_M 0x3508 +#define OV4689_REG_GAIN_L 0x3509 +#define OV4689_REG_TEST_PATTERN 0x5040 +#define OV4689_REG_TIMING_TC_REG20 0x3820 +#define OV4689_REG_TIMING_TC_REG21 0x3821 + +#define OV4689_REG_AWB_R_GAIN 0x500C +#define OV4689_REG_AWB_B_GAIN 0x5010 + + +enum ov4689_mode_id { + OV4689_MODE_720P_1280_720 = 0, + OV4689_MODE_1080P_1920_1080, + OV4689_MODE_4M_2688_1520, + OV4689_NUM_MODES, +}; + +enum ov4689_frame_rate { + OV4689_15_FPS = 0, + OV4689_30_FPS, + OV4689_45_FPS, + OV4689_60_FPS, + OV4689_90_FPS, + OV4689_120_FPS, + OV4689_150_FPS, + OV4689_180_FPS, + OV4689_330_FPS, + OV4689_NUM_FRAMERATES, +}; + +enum ov4689_format_mux { + OV4689_FMT_MUX_RAW, +}; + +static const int ov4689_framerates[] = { + [OV4689_15_FPS] = 15, + [OV4689_30_FPS] = 30, + [OV4689_45_FPS] = 45, + [OV4689_60_FPS] = 60, + [OV4689_90_FPS] = 90, + [OV4689_120_FPS] = 120, + [OV4689_150_FPS] = 150, + [OV4689_180_FPS] = 180, + [OV4689_330_FPS] = 330, +}; + +/* regulator supplies */ +static const char * const ov4689_supply_name[] = { + "DOVDD", /* Digital I/O (1.8V) supply */ + "AVDD", /* Analog (2.8V) supply */ + "DVDD", /* Digital Core (1.5V) supply */ +}; + +#define OV4689_NUM_SUPPLIES ARRAY_SIZE(ov4689_supply_name) + +/* + * Image size under 1280 * 960 are SUBSAMPLING + * Image size upper 1280 * 960 are SCALING + */ +enum ov4689_downsize_mode { + SUBSAMPLING, + SCALING, +}; + +struct reg_value { + u16 reg_addr; + u8 val; + u8 mask; + u32 delay_ms; +}; + +struct ov4689_mode_info { + enum ov4689_mode_id id; + enum ov4689_downsize_mode dn_mode; + u32 hact; + u32 htot; + u32 vact; + u32 vtot; + const struct reg_value *reg_data; + u32 reg_data_size; + u32 max_fps; +}; + +struct ov4689_ctrls { + struct v4l2_ctrl_handler handler; + struct v4l2_ctrl *pixel_rate; + struct { + struct v4l2_ctrl *exposure; + }; + struct { + struct v4l2_ctrl *auto_wb; + struct v4l2_ctrl *blue_balance; + struct v4l2_ctrl *red_balance; + }; + struct { + struct v4l2_ctrl *anal_gain; + }; + struct v4l2_ctrl *brightness; + struct v4l2_ctrl *light_freq; + struct v4l2_ctrl *link_freq; + struct v4l2_ctrl *saturation; + struct v4l2_ctrl *contrast; + struct v4l2_ctrl *hue; + struct v4l2_ctrl *test_pattern; + struct v4l2_ctrl *hflip; + struct v4l2_ctrl *vflip; +}; + +struct ov4689_dev { + struct i2c_client *i2c_client; + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ + struct clk *xclk; /* system clock to OV4689 */ + u32 xclk_freq; + + struct regulator_bulk_data supplies[OV4689_NUM_SUPPLIES]; + struct gpio_desc *reset_gpio; + struct gpio_desc *pwdn_gpio; + bool upside_down; + + /* lock to protect all members below */ + struct mutex lock; + + int power_count; + + struct v4l2_mbus_framefmt fmt; + + const struct ov4689_mode_info *current_mode; + const struct ov4689_mode_info *last_mode; + enum ov4689_frame_rate current_fr; + struct v4l2_fract frame_interval; + + struct ov4689_ctrls ctrls; + + u32 prev_sysclk, prev_hts; + u32 ae_low, ae_high, ae_target; + + bool pending_mode_change; + bool streaming; +}; + +static inline struct ov4689_dev *to_ov4689_dev(struct v4l2_subdev *sd) +{ + return container_of(sd, struct ov4689_dev, sd); +} + +static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) +{ + return &container_of(ctrl->handler, struct ov4689_dev, + ctrls.handler)->sd; +} + +/* ov4689 initial register */ +static const struct reg_value ov4689_init_setting_30fps_1080P[] = { + +}; + +static const struct reg_value ov4689_setting_VGA_640_480[] = { + //@@ RES_640x480_2x_Bin_330fps_816Mbps + //OV4689_AM01B_640x480_24M_2lane_816Mbps_330fps_20140210.txt + {0x0103, 0x01, 0, 0}, + {0x3638, 0x00, 0, 0}, + {0x0300, 0x00, 0, 0}, // 00 + {0x0302, 0x22, 0, 0}, // 816Mbps 5a ; 64 ; 5a ; 78 ; 78 ; 2a + {0x0303, 0x00, 0, 0}, // 03 ; 01 ; 02 ; + {0x0304, 0x03, 0, 0}, + {0x030b, 0x00, 0, 0}, + {0x030d, 0x1e, 0, 0}, + {0x030e, 0x04, 0, 0}, + {0x030f, 0x01, 0, 0}, + {0x0312, 0x01, 0, 0}, + {0x031e, 0x00, 0, 0}, + {0x3000, 0x20, 0, 0}, + {0x3002, 0x00, 0, 0}, + {0x3018, 0x32, 0, 0}, // 32/72 2lane/4lane + {0x3019, 0x0c, 0, 0}, // 0c/00 2lane/4lane + {0x3020, 0x93, 0, 0}, + {0x3021, 0x03, 0, 0}, + {0x3022, 0x01, 0, 0}, + {0x3031, 0x0a, 0, 0}, + {0x303f, 0x0c, 0, 0}, + {0x3305, 0xf1, 0, 0}, + {0x3307, 0x04, 0, 0}, + {0x3309, 0x29, 0, 0}, + {0x3500, 0x00, 0, 0}, + {0x3501, 0x4c, 0, 0}, + {0x3502, 0x00, 0, 0}, + {0x3503, 0x04, 0, 0}, + {0x3504, 0x00, 0, 0}, + {0x3505, 0x00, 0, 0}, + {0x3506, 0x00, 0, 0}, + {0x3507, 0x00, 0, 0}, + {0x3508, 0x00, 0, 0}, + {0x3509, 0x80, 0, 0}, // 8X + {0x350a, 0x00, 0, 0}, + {0x350b, 0x00, 0, 0}, + {0x350c, 0x00, 0, 0}, + {0x350d, 0x00, 0, 0}, + {0x350e, 0x00, 0, 0}, + {0x350f, 0x80, 0, 0}, + {0x3510, 0x00, 0, 0}, + {0x3511, 0x00, 0, 0}, + {0x3512, 0x00, 0, 0}, + {0x3513, 0x00, 0, 0}, + {0x3514, 0x00, 0, 0}, + {0x3515, 0x80, 0, 0}, + {0x3516, 0x00, 0, 0}, + {0x3517, 0x00, 0, 0}, + {0x3518, 0x00, 0, 0}, + {0x3519, 0x00, 0, 0}, + {0x351a, 0x00, 0, 0}, + {0x351b, 0x80, 0, 0}, + {0x351c, 0x00, 0, 0}, + {0x351d, 0x00, 0, 0}, + {0x351e, 0x00, 0, 0}, + {0x351f, 0x00, 0, 0}, + {0x3520, 0x00, 0, 0}, + {0x3521, 0x80, 0, 0}, + {0x3522, 0x08, 0, 0}, + {0x3524, 0x08, 0, 0}, + {0x3526, 0x08, 0, 0}, + {0x3528, 0x08, 0, 0}, + {0x352a, 0x08, 0, 0}, + {0x3602, 0x00, 0, 0}, + {0x3603, 0x40, 0, 0}, + {0x3604, 0x02, 0, 0}, + {0x3605, 0x00, 0, 0}, + {0x3606, 0x00, 0, 0}, + {0x3607, 0x00, 0, 0}, + {0x3609, 0x12, 0, 0}, + {0x360a, 0x40, 0, 0}, + {0x360c, 0x08, 0, 0}, + {0x360f, 0xe5, 0, 0}, + {0x3608, 0x8f, 0, 0}, + {0x3611, 0x00, 0, 0}, + {0x3613, 0xf7, 0, 0}, + {0x3616, 0x58, 0, 0}, + {0x3619, 0x99, 0, 0}, + {0x361b, 0x60, 0, 0}, + {0x361c, 0x7a, 0, 0}, + {0x361e, 0x79, 0, 0}, + {0x361f, 0x02, 0, 0}, + {0x3632, 0x05, 0, 0}, + {0x3633, 0x10, 0, 0}, + {0x3634, 0x10, 0, 0}, + {0x3635, 0x10, 0, 0}, + {0x3636, 0x15, 0, 0}, + {0x3646, 0x86, 0, 0}, + {0x364a, 0x0b, 0, 0}, + {0x3700, 0x17, 0, 0}, + {0x3701, 0x22, 0, 0}, + {0x3703, 0x10, 0, 0}, + {0x370a, 0x37, 0, 0}, + {0x3705, 0x00, 0, 0}, + {0x3706, 0x63, 0, 0}, + {0x3709, 0x3c, 0, 0}, + {0x370b, 0x01, 0, 0}, + {0x370c, 0x30, 0, 0}, + {0x3710, 0x24, 0, 0}, + {0x3711, 0x0c, 0, 0}, + {0x3716, 0x00, 0, 0}, + {0x3720, 0x28, 0, 0}, + {0x3729, 0x7b, 0, 0}, + {0x372a, 0x84, 0, 0}, + {0x372b, 0xbd, 0, 0}, + {0x372c, 0xbc, 0, 0}, + {0x372e, 0x52, 0, 0}, + {0x373c, 0x0e, 0, 0}, + {0x373e, 0x33, 0, 0}, + {0x3743, 0x10, 0, 0}, + {0x3744, 0x88, 0, 0}, + {0x3745, 0xc0, 0, 0}, + {0x374a, 0x43, 0, 0}, + {0x374c, 0x00, 0, 0}, + {0x374e, 0x23, 0, 0}, + {0x3751, 0x7b, 0, 0}, + {0x3752, 0x84, 0, 0}, + {0x3753, 0xbd, 0, 0}, + {0x3754, 0xbc, 0, 0}, + {0x3756, 0x52, 0, 0}, + {0x375c, 0x00, 0, 0}, + {0x3760, 0x00, 0, 0}, + {0x3761, 0x00, 0, 0}, + {0x3762, 0x00, 0, 0}, + {0x3763, 0x00, 0, 0}, + {0x3764, 0x00, 0, 0}, + {0x3767, 0x04, 0, 0}, + {0x3768, 0x04, 0, 0}, + {0x3769, 0x08, 0, 0}, + {0x376a, 0x08, 0, 0}, + {0x376b, 0x40, 0, 0}, + {0x376c, 0x00, 0, 0}, + {0x376d, 0x00, 0, 0}, + {0x376e, 0x00, 0, 0}, + {0x3773, 0x00, 0, 0}, + {0x3774, 0x51, 0, 0}, + {0x3776, 0xbd, 0, 0}, + {0x3777, 0xbd, 0, 0}, + {0x3781, 0x18, 0, 0}, + {0x3783, 0x25, 0, 0}, + {0x3798, 0x1b, 0, 0}, + {0x3800, 0x00, 0, 0}, + {0x3801, 0x48, 0, 0}, + {0x3802, 0x00, 0, 0}, + {0x3803, 0x2C, 0, 0}, + {0x3804, 0x0a, 0, 0}, + {0x3805, 0x57, 0, 0}, + {0x3806, 0x05, 0, 0}, + {0x3807, 0xD3, 0, 0}, + {0x3808, 0x02, 0, 0}, + {0x3809, 0x80, 0, 0}, + {0x380a, 0x01, 0, 0}, + {0x380b, 0xe0, 0, 0}, + + {0x380c, 0x02, 0, 0}, // 0a ; 03 + {0x380d, 0x04, 0, 0}, // 1c ; 5C + + {0x380e, 0x03, 0, 0}, + {0x380f, 0x05, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x04, 0, 0}, + {0x3812, 0x00, 0, 0}, + {0x3813, 0x02, 0, 0}, + {0x3814, 0x03, 0, 0}, + {0x3815, 0x01, 0, 0}, + {0x3819, 0x01, 0, 0}, + {0x3820, 0x06, 0, 0}, + {0x3821, 0x00, 0, 0}, + {0x3829, 0x00, 0, 0}, + {0x382a, 0x03, 0, 0}, + {0x382b, 0x01, 0, 0}, + {0x382d, 0x7f, 0, 0}, + {0x3830, 0x08, 0, 0}, + {0x3836, 0x02, 0, 0}, + {0x3837, 0x00, 0, 0}, + {0x3841, 0x02, 0, 0}, + {0x3846, 0x08, 0, 0}, + {0x3847, 0x07, 0, 0}, + {0x3d85, 0x36, 0, 0}, + {0x3d8c, 0x71, 0, 0}, + {0x3d8d, 0xcb, 0, 0}, + {0x3f0a, 0x00, 0, 0}, + {0x4000, 0x71, 0, 0}, + {0x4001, 0x50, 0, 0}, + {0x4002, 0x04, 0, 0}, + {0x4003, 0x14, 0, 0}, + {0x400e, 0x00, 0, 0}, + {0x4011, 0x00, 0, 0}, + {0x401a, 0x00, 0, 0}, + {0x401b, 0x00, 0, 0}, + {0x401c, 0x00, 0, 0}, + {0x401d, 0x00, 0, 0}, + {0x401f, 0x00, 0, 0}, + {0x4020, 0x00, 0, 0}, + {0x4021, 0x10, 0, 0}, + {0x4022, 0x03, 0, 0}, + {0x4023, 0x93, 0, 0}, + {0x4024, 0x04, 0, 0}, + {0x4025, 0xC0, 0, 0}, + {0x4026, 0x04, 0, 0}, + {0x4027, 0xD0, 0, 0}, + {0x4028, 0x00, 0, 0}, + {0x4029, 0x02, 0, 0}, + {0x402a, 0x06, 0, 0}, + {0x402b, 0x04, 0, 0}, + {0x402c, 0x02, 0, 0}, + {0x402d, 0x02, 0, 0}, + {0x402e, 0x0e, 0, 0}, + {0x402f, 0x04, 0, 0}, + {0x4302, 0xff, 0, 0}, + {0x4303, 0xff, 0, 0}, + {0x4304, 0x00, 0, 0}, + {0x4305, 0x00, 0, 0}, + {0x4306, 0x00, 0, 0}, + {0x4308, 0x02, 0, 0}, + {0x4500, 0x6c, 0, 0}, + {0x4501, 0xc4, 0, 0}, + {0x4502, 0x44, 0, 0}, + {0x4503, 0x01, 0, 0}, + {0x4600, 0x00, 0, 0}, + {0x4601, 0x4F, 0, 0}, + {0x4800, 0x04, 0, 0}, + {0x4813, 0x08, 0, 0}, + {0x481f, 0x40, 0, 0}, + {0x4829, 0x78, 0, 0}, + {0x4837, 0x10, 0, 0}, // 20 ; 10 + {0x4b00, 0x2a, 0, 0}, + {0x4b0d, 0x00, 0, 0}, + {0x4d00, 0x04, 0, 0}, + {0x4d01, 0x42, 0, 0}, + {0x4d02, 0xd1, 0, 0}, + {0x4d03, 0x93, 0, 0}, + {0x4d04, 0xf5, 0, 0}, + {0x4d05, 0xc1, 0, 0}, + {0x5000, 0xf3, 0, 0}, + {0x5001, 0x11, 0, 0}, + {0x5004, 0x00, 0, 0}, + {0x500a, 0x00, 0, 0}, + {0x500b, 0x00, 0, 0}, + {0x5032, 0x00, 0, 0}, + {0x5040, 0x00, 0, 0}, + {0x5050, 0x3c, 0, 0}, + {0x5500, 0x00, 0, 0}, + {0x5501, 0x10, 0, 0}, + {0x5502, 0x01, 0, 0}, + {0x5503, 0x0f, 0, 0}, + {0x8000, 0x00, 0, 0}, + {0x8001, 0x00, 0, 0}, + {0x8002, 0x00, 0, 0}, + {0x8003, 0x00, 0, 0}, + {0x8004, 0x00, 0, 0}, + {0x8005, 0x00, 0, 0}, + {0x8006, 0x00, 0, 0}, + {0x8007, 0x00, 0, 0}, + {0x8008, 0x00, 0, 0}, + {0x3638, 0x00, 0, 0}, +}; + +static const struct reg_value ov4689_setting_720P_1280_720[] = { + //@@ RES_1280x720_2x_Bin_150fps_816Mbps + //OV4689_AM01B_1280x720_24M_2lane_816Mbps_150fps_20140210.txt + {0x0103, 0x01, 0, 0}, + {0x3638, 0x00, 0, 0}, + {0x0300, 0x00, 0, 0}, // 00 + {0x0302, 0x22, 0, 0}, // 816Mbps 5a ; 64 ; 5a ; 78 ; 78 ; 2a + {0x0303, 0x00, 0, 0}, // 03 ; 01 ; 02 ; + {0x0304, 0x03, 0, 0}, + {0x030b, 0x00, 0, 0}, + {0x030d, 0x1e, 0, 0}, + {0x030e, 0x04, 0, 0}, + {0x030f, 0x01, 0, 0}, + {0x0312, 0x01, 0, 0}, + {0x031e, 0x00, 0, 0}, + {0x3000, 0x20, 0, 0}, + {0x3002, 0x00, 0, 0}, + {0x3018, 0x32, 0, 0}, // 32/72 2lane/4lane + {0x3019, 0x0c, 0, 0}, // 0c/00 2lane/4lane + {0x3020, 0x93, 0, 0}, + {0x3021, 0x03, 0, 0}, + {0x3022, 0x01, 0, 0}, + {0x3031, 0x0a, 0, 0}, + {0x303f, 0x0c, 0, 0}, + {0x3305, 0xf1, 0, 0}, + {0x3307, 0x04, 0, 0}, + {0x3309, 0x29, 0, 0}, + {0x3500, 0x00, 0, 0}, + {0x3501, 0x30, 0, 0}, + {0x3502, 0x00, 0, 0}, + {0x3503, 0x04, 0, 0}, + {0x3504, 0x00, 0, 0}, + {0x3505, 0x00, 0, 0}, + {0x3506, 0x00, 0, 0}, + {0x3507, 0x00, 0, 0}, + {0x3508, 0x07, 0, 0}, + {0x3509, 0x78, 0, 0}, // 8X + {0x350a, 0x00, 0, 0}, + {0x350b, 0x00, 0, 0}, + {0x350c, 0x00, 0, 0}, + {0x350d, 0x00, 0, 0}, + {0x350e, 0x00, 0, 0}, + {0x350f, 0x80, 0, 0}, + {0x3510, 0x00, 0, 0}, + {0x3511, 0x00, 0, 0}, + {0x3512, 0x00, 0, 0}, + {0x3513, 0x00, 0, 0}, + {0x3514, 0x00, 0, 0}, + {0x3515, 0x80, 0, 0}, + {0x3516, 0x00, 0, 0}, + {0x3517, 0x00, 0, 0}, + {0x3518, 0x00, 0, 0}, + {0x3519, 0x00, 0, 0}, + {0x351a, 0x00, 0, 0}, + {0x351b, 0x80, 0, 0}, + {0x351c, 0x00, 0, 0}, + {0x351d, 0x00, 0, 0}, + {0x351e, 0x00, 0, 0}, + {0x351f, 0x00, 0, 0}, + {0x3520, 0x00, 0, 0}, + {0x3521, 0x80, 0, 0}, + {0x3522, 0x08, 0, 0}, + {0x3524, 0x08, 0, 0}, + {0x3526, 0x08, 0, 0}, + {0x3528, 0x08, 0, 0}, + {0x352a, 0x08, 0, 0}, + {0x3602, 0x00, 0, 0}, + {0x3603, 0x40, 0, 0}, + {0x3604, 0x02, 0, 0}, + {0x3605, 0x00, 0, 0}, + {0x3606, 0x00, 0, 0}, + {0x3607, 0x00, 0, 0}, + {0x3609, 0x12, 0, 0}, + {0x360a, 0x40, 0, 0}, + {0x360c, 0x08, 0, 0}, + {0x360f, 0xe5, 0, 0}, + {0x3608, 0x8f, 0, 0}, + {0x3611, 0x00, 0, 0}, + {0x3613, 0xf7, 0, 0}, + {0x3616, 0x58, 0, 0}, + {0x3619, 0x99, 0, 0}, + {0x361b, 0x60, 0, 0}, + {0x361c, 0x7a, 0, 0}, + {0x361e, 0x79, 0, 0}, + {0x361f, 0x02, 0, 0}, + {0x3632, 0x05, 0, 0}, + {0x3633, 0x10, 0, 0}, + {0x3634, 0x10, 0, 0}, + {0x3635, 0x10, 0, 0}, + {0x3636, 0x15, 0, 0}, + {0x3646, 0x86, 0, 0}, + {0x364a, 0x0b, 0, 0}, + {0x3700, 0x17, 0, 0}, + {0x3701, 0x22, 0, 0}, + {0x3703, 0x10, 0, 0}, + {0x370a, 0x37, 0, 0}, + {0x3705, 0x00, 0, 0}, + {0x3706, 0x63, 0, 0}, + {0x3709, 0x3c, 0, 0}, + {0x370b, 0x01, 0, 0}, + {0x370c, 0x30, 0, 0}, + {0x3710, 0x24, 0, 0}, + {0x3711, 0x0c, 0, 0}, + {0x3716, 0x00, 0, 0}, + {0x3720, 0x28, 0, 0}, + {0x3729, 0x7b, 0, 0}, + {0x372a, 0x84, 0, 0}, + {0x372b, 0xbd, 0, 0}, + {0x372c, 0xbc, 0, 0}, + {0x372e, 0x52, 0, 0}, + {0x373c, 0x0e, 0, 0}, + {0x373e, 0x33, 0, 0}, + {0x3743, 0x10, 0, 0}, + {0x3744, 0x88, 0, 0}, + {0x3745, 0xc0, 0, 0}, + {0x374a, 0x43, 0, 0}, + {0x374c, 0x00, 0, 0}, + {0x374e, 0x23, 0, 0}, + {0x3751, 0x7b, 0, 0}, + {0x3752, 0x84, 0, 0}, + {0x3753, 0xbd, 0, 0}, + {0x3754, 0xbc, 0, 0}, + {0x3756, 0x52, 0, 0}, + {0x375c, 0x00, 0, 0}, + {0x3760, 0x00, 0, 0}, + {0x3761, 0x00, 0, 0}, + {0x3762, 0x00, 0, 0}, + {0x3763, 0x00, 0, 0}, + {0x3764, 0x00, 0, 0}, + {0x3767, 0x04, 0, 0}, + {0x3768, 0x04, 0, 0}, + {0x3769, 0x08, 0, 0}, + {0x376a, 0x08, 0, 0}, + {0x376b, 0x40, 0, 0}, + {0x376c, 0x00, 0, 0}, + {0x376d, 0x00, 0, 0}, + {0x376e, 0x00, 0, 0}, + {0x3773, 0x00, 0, 0}, + {0x3774, 0x51, 0, 0}, + {0x3776, 0xbd, 0, 0}, + {0x3777, 0xbd, 0, 0}, + {0x3781, 0x18, 0, 0}, + {0x3783, 0x25, 0, 0}, + {0x3798, 0x1b, 0, 0}, + {0x3800, 0x00, 0, 0}, + {0x3801, 0x48, 0, 0}, + {0x3802, 0x00, 0, 0}, + {0x3803, 0x2C, 0, 0}, + {0x3804, 0x0a, 0, 0}, + {0x3805, 0x57, 0, 0}, + {0x3806, 0x05, 0, 0}, + {0x3807, 0xD3, 0, 0}, + {0x3808, 0x05, 0, 0}, + {0x3809, 0x00, 0, 0}, + {0x380a, 0x02, 0, 0}, + {0x380b, 0xD0, 0, 0}, +#if 1 + {0x380c, 0x04, 0, 0}, // 0a ; 03 + {0x380d, 0x08, 0, 0}, // 1c ; 5C +#else + {0x380c, 0x05, 0, 0}, // 120fps + {0x380d, 0x0A, 0, 0}, +#endif + {0x380e, 0x03, 0, 0}, + {0x380f, 0x05, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x04, 0, 0}, + {0x3812, 0x00, 0, 0}, + {0x3813, 0x02, 0, 0}, + {0x3814, 0x03, 0, 0}, + {0x3815, 0x01, 0, 0}, + {0x3819, 0x01, 0, 0}, + {0x3820, 0x06, 0, 0}, + {0x3821, 0x00, 0, 0}, + {0x3829, 0x00, 0, 0}, + {0x382a, 0x03, 0, 0}, + {0x382b, 0x01, 0, 0}, + {0x382d, 0x7f, 0, 0}, + {0x3830, 0x08, 0, 0}, + {0x3836, 0x02, 0, 0}, + {0x3837, 0x00, 0, 0}, + {0x3841, 0x02, 0, 0}, + {0x3846, 0x08, 0, 0}, + {0x3847, 0x07, 0, 0}, + {0x3d85, 0x36, 0, 0}, + {0x3d8c, 0x71, 0, 0}, + {0x3d8d, 0xcb, 0, 0}, + {0x3f0a, 0x00, 0, 0}, + {0x4000, 0x71, 0, 0}, + {0x4001, 0x50, 0, 0}, + {0x4002, 0x04, 0, 0}, + {0x4003, 0x14, 0, 0}, + {0x400e, 0x00, 0, 0}, + {0x4011, 0x00, 0, 0}, + {0x401a, 0x00, 0, 0}, + {0x401b, 0x00, 0, 0}, + {0x401c, 0x00, 0, 0}, + {0x401d, 0x00, 0, 0}, + {0x401f, 0x00, 0, 0}, + {0x4020, 0x00, 0, 0}, + {0x4021, 0x10, 0, 0}, + {0x4022, 0x03, 0, 0}, + {0x4023, 0x93, 0, 0}, + {0x4024, 0x04, 0, 0}, + {0x4025, 0xC0, 0, 0}, + {0x4026, 0x04, 0, 0}, + {0x4027, 0xD0, 0, 0}, + {0x4028, 0x00, 0, 0}, + {0x4029, 0x02, 0, 0}, + {0x402a, 0x06, 0, 0}, + {0x402b, 0x04, 0, 0}, + {0x402c, 0x02, 0, 0}, + {0x402d, 0x02, 0, 0}, + {0x402e, 0x0e, 0, 0}, + {0x402f, 0x04, 0, 0}, + {0x4302, 0xff, 0, 0}, + {0x4303, 0xff, 0, 0}, + {0x4304, 0x00, 0, 0}, + {0x4305, 0x00, 0, 0}, + {0x4306, 0x00, 0, 0}, + {0x4308, 0x02, 0, 0}, + {0x4500, 0x6c, 0, 0}, + {0x4501, 0xc4, 0, 0}, + {0x4502, 0x44, 0, 0}, + {0x4503, 0x01, 0, 0}, + {0x4600, 0x00, 0, 0}, + {0x4601, 0x4F, 0, 0}, + {0x4800, 0x04, 0, 0}, + {0x4813, 0x08, 0, 0}, + {0x481f, 0x40, 0, 0}, + {0x4829, 0x78, 0, 0}, + {0x4837, 0x10, 0, 0}, // 20 ; 10 + {0x4b00, 0x2a, 0, 0}, + {0x4b0d, 0x00, 0, 0}, + {0x4d00, 0x04, 0, 0}, + {0x4d01, 0x42, 0, 0}, + {0x4d02, 0xd1, 0, 0}, + {0x4d03, 0x93, 0, 0}, + {0x4d04, 0xf5, 0, 0}, + {0x4d05, 0xc1, 0, 0}, + {0x5000, 0xf3, 0, 0}, + {0x5001, 0x11, 0, 0}, + {0x5004, 0x00, 0, 0}, + {0x500a, 0x00, 0, 0}, + {0x500b, 0x00, 0, 0}, + {0x5032, 0x00, 0, 0}, + {0x5040, 0x00, 0, 0}, + {0x5050, 0x3c, 0, 0}, + {0x5500, 0x00, 0, 0}, + {0x5501, 0x10, 0, 0}, + {0x5502, 0x01, 0, 0}, + {0x5503, 0x0f, 0, 0}, + {0x8000, 0x00, 0, 0}, + {0x8001, 0x00, 0, 0}, + {0x8002, 0x00, 0, 0}, + {0x8003, 0x00, 0, 0}, + {0x8004, 0x00, 0, 0}, + {0x8005, 0x00, 0, 0}, + {0x8006, 0x00, 0, 0}, + {0x8007, 0x00, 0, 0}, + {0x8008, 0x00, 0, 0}, + {0x3638, 0x00, 0, 0}, +}; + +static const struct reg_value ov4689_setting_1080P_1920_1080[] = { + //@@ RES_1920x1080_60fps_816Mbps 2lanes + {0x0103, 0x01, 0, 0}, + {0x3638, 0x00, 0, 0}, + {0x0300, 0x00, 0, 0}, // clk + {0x0302, 0x22, 0, 0}, + {0x0303, 0x00, 0, 0}, + {0x0304, 0x03, 0, 0}, + {0x030b, 0x00, 0, 0}, + {0x030d, 0x1e, 0, 0}, + {0x030e, 0x04, 0, 0}, + {0x030f, 0x01, 0, 0}, + {0x0312, 0x01, 0, 0}, + {0x031e, 0x00, 0, 0}, + {0x3000, 0x20, 0, 0}, + {0x3002, 0x00, 0, 0}, + {0x3018, 0x32, 0, 0}, + {0x3019, 0x0c, 0, 0}, + {0x3020, 0x93, 0, 0}, + {0x3021, 0x03, 0, 0}, + {0x3022, 0x01, 0, 0}, + {0x3031, 0x0a, 0, 0}, + {0x303f, 0x0c, 0, 0}, + {0x3305, 0xf1, 0, 0}, + {0x3307, 0x04, 0, 0}, + {0x3309, 0x29, 0, 0}, + {0x3500, 0x00, 0, 0}, // AEC + {0x3501, 0x4c, 0, 0}, + {0x3502, 0x00, 0, 0}, + {0x3503, 0x04, 0, 0}, + {0x3504, 0x00, 0, 0}, + {0x3505, 0x00, 0, 0}, + {0x3506, 0x00, 0, 0}, + {0x3507, 0x00, 0, 0}, + {0x3508, 0x00, 0, 0}, + {0x3509, 0x80, 0, 0}, + {0x350a, 0x00, 0, 0}, + {0x350b, 0x00, 0, 0}, + {0x350c, 0x00, 0, 0}, + {0x350d, 0x00, 0, 0}, + {0x350e, 0x00, 0, 0}, + {0x350f, 0x80, 0, 0}, + {0x3510, 0x00, 0, 0}, + {0x3511, 0x00, 0, 0}, + {0x3512, 0x00, 0, 0}, + {0x3513, 0x00, 0, 0}, + {0x3514, 0x00, 0, 0}, + {0x3515, 0x80, 0, 0}, + {0x3516, 0x00, 0, 0}, + {0x3517, 0x00, 0, 0}, + {0x3518, 0x00, 0, 0}, + {0x3519, 0x00, 0, 0}, + {0x351a, 0x00, 0, 0}, + {0x351b, 0x80, 0, 0}, + {0x351c, 0x00, 0, 0}, + {0x351d, 0x00, 0, 0}, + {0x351e, 0x00, 0, 0}, + {0x351f, 0x00, 0, 0}, + {0x3520, 0x00, 0, 0}, + {0x3521, 0x80, 0, 0}, + {0x3522, 0x08, 0, 0}, + {0x3524, 0x08, 0, 0}, + {0x3526, 0x08, 0, 0}, + {0x3528, 0x08, 0, 0}, + {0x352a, 0x08, 0, 0}, + {0x3602, 0x00, 0, 0}, + {0x3603, 0x40, 0, 0}, + {0x3604, 0x02, 0, 0}, + {0x3605, 0x00, 0, 0}, + {0x3606, 0x00, 0, 0}, + {0x3607, 0x00, 0, 0}, + {0x3609, 0x12, 0, 0}, + {0x360a, 0x40, 0, 0}, + {0x360c, 0x08, 0, 0}, + {0x360f, 0xe5, 0, 0}, + {0x3608, 0x8f, 0, 0}, + {0x3611, 0x00, 0, 0}, + {0x3613, 0xf7, 0, 0}, + {0x3616, 0x58, 0, 0}, + {0x3619, 0x99, 0, 0}, + {0x361b, 0x60, 0, 0}, + {0x361c, 0x7a, 0, 0}, + {0x361e, 0x79, 0, 0}, + {0x361f, 0x02, 0, 0}, + {0x3632, 0x00, 0, 0}, + {0x3633, 0x10, 0, 0}, + {0x3634, 0x10, 0, 0}, + {0x3635, 0x10, 0, 0}, + {0x3636, 0x15, 0, 0}, + {0x3646, 0x86, 0, 0}, + {0x364a, 0x0b, 0, 0}, + {0x3700, 0x17, 0, 0}, + {0x3701, 0x22, 0, 0}, + {0x3703, 0x10, 0, 0}, + {0x370a, 0x37, 0, 0}, + {0x3705, 0x00, 0, 0}, + {0x3706, 0x63, 0, 0}, + {0x3709, 0x3c, 0, 0}, + {0x370b, 0x01, 0, 0}, + {0x370c, 0x30, 0, 0}, + {0x3710, 0x24, 0, 0}, + {0x3711, 0x0c, 0, 0}, + {0x3716, 0x00, 0, 0}, + {0x3720, 0x28, 0, 0}, + {0x3729, 0x7b, 0, 0}, + {0x372a, 0x84, 0, 0}, + {0x372b, 0xbd, 0, 0}, + {0x372c, 0xbc, 0, 0}, + {0x372e, 0x52, 0, 0}, + {0x373c, 0x0e, 0, 0}, + {0x373e, 0x33, 0, 0}, + {0x3743, 0x10, 0, 0}, + {0x3744, 0x88, 0, 0}, + {0x3745, 0xc0, 0, 0}, + {0x374a, 0x43, 0, 0}, + {0x374c, 0x00, 0, 0}, + {0x374e, 0x23, 0, 0}, + {0x3751, 0x7b, 0, 0}, + {0x3752, 0x84, 0, 0}, + {0x3753, 0xbd, 0, 0}, + {0x3754, 0xbc, 0, 0}, + {0x3756, 0x52, 0, 0}, + {0x375c, 0x00, 0, 0}, + {0x3760, 0x00, 0, 0}, + {0x3761, 0x00, 0, 0}, + {0x3762, 0x00, 0, 0}, + {0x3763, 0x00, 0, 0}, + {0x3764, 0x00, 0, 0}, + {0x3767, 0x04, 0, 0}, + {0x3768, 0x04, 0, 0}, + {0x3769, 0x08, 0, 0}, + {0x376a, 0x08, 0, 0}, + {0x376b, 0x20, 0, 0}, + {0x376c, 0x00, 0, 0}, + {0x376d, 0x00, 0, 0}, + {0x376e, 0x00, 0, 0}, + {0x3773, 0x00, 0, 0}, + {0x3774, 0x51, 0, 0}, + {0x3776, 0xbd, 0, 0}, + {0x3777, 0xbd, 0, 0}, + {0x3781, 0x18, 0, 0}, + {0x3783, 0x25, 0, 0}, + {0x3798, 0x1b, 0, 0}, + {0x3800, 0x01, 0, 0}, // timings + {0x3801, 0x88, 0, 0}, + {0x3802, 0x00, 0, 0}, + {0x3803, 0xe0, 0, 0}, + {0x3804, 0x09, 0, 0}, + {0x3805, 0x17, 0, 0}, + {0x3806, 0x05, 0, 0}, + {0x3807, 0x1f, 0, 0}, + {0x3808, 0x07, 0, 0}, + {0x3809, 0x80, 0, 0}, + {0x380a, 0x04, 0, 0}, + {0x380b, 0x38, 0, 0}, + {0x380c, 0x06, 0, 0}, + {0x380d, 0xe0, 0, 0}, + {0x380e, 0x04, 0, 0}, + {0x380f, 0x70, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x08, 0, 0}, + {0x3812, 0x00, 0, 0}, + {0x3813, 0x04, 0, 0}, + {0x3814, 0x01, 0, 0}, + {0x3815, 0x01, 0, 0}, + {0x3819, 0x01, 0, 0}, + {0x3820, 0x06, 0, 0}, + {0x3821, 0x00, 0, 0}, + {0x3829, 0x00, 0, 0}, + {0x382a, 0x01, 0, 0}, + {0x382b, 0x01, 0, 0}, + {0x382d, 0x7f, 0, 0}, + {0x3830, 0x04, 0, 0}, + {0x3836, 0x01, 0, 0}, + {0x3837, 0x00, 0, 0}, + {0x3841, 0x02, 0, 0}, + {0x3846, 0x08, 0, 0}, + {0x3847, 0x07, 0, 0}, + {0x3d85, 0x36, 0, 0}, + {0x3d8c, 0x71, 0, 0}, + {0x3d8d, 0xcb, 0, 0}, + {0x3f0a, 0x00, 0, 0}, + {0x4000, 0xf1, 0, 0}, + {0x4001, 0x40, 0, 0}, + {0x4002, 0x04, 0, 0}, + {0x4003, 0x14, 0, 0}, + {0x400e, 0x00, 0, 0}, + {0x4011, 0x00, 0, 0}, + {0x401a, 0x00, 0, 0}, + {0x401b, 0x00, 0, 0}, + {0x401c, 0x00, 0, 0}, + {0x401d, 0x00, 0, 0}, + {0x401f, 0x00, 0, 0}, + {0x4020, 0x00, 0, 0}, + {0x4021, 0x10, 0, 0}, + {0x4022, 0x06, 0, 0}, + {0x4023, 0x13, 0, 0}, + {0x4024, 0x07, 0, 0}, + {0x4025, 0x40, 0, 0}, + {0x4026, 0x07, 0, 0}, + {0x4027, 0x50, 0, 0}, + {0x4028, 0x00, 0, 0}, + {0x4029, 0x02, 0, 0}, + {0x402a, 0x06, 0, 0}, + {0x402b, 0x04, 0, 0}, + {0x402c, 0x02, 0, 0}, + {0x402d, 0x02, 0, 0}, + {0x402e, 0x0e, 0, 0}, + {0x402f, 0x04, 0, 0}, + {0x4302, 0xff, 0, 0}, + {0x4303, 0xff, 0, 0}, + {0x4304, 0x00, 0, 0}, + {0x4305, 0x00, 0, 0}, + {0x4306, 0x00, 0, 0}, + {0x4308, 0x02, 0, 0}, + {0x4500, 0x6c, 0, 0}, + {0x4501, 0xc4, 0, 0}, + {0x4502, 0x40, 0, 0}, + {0x4503, 0x01, 0, 0}, + {0x4601, 0x77, 0, 0}, + {0x4800, 0x04, 0, 0}, + {0x4813, 0x08, 0, 0}, + {0x481f, 0x40, 0, 0}, + {0x4829, 0x78, 0, 0}, + {0x4837, 0x10, 0, 0}, + {0x4b00, 0x2a, 0, 0}, + {0x4b0d, 0x00, 0, 0}, + {0x4d00, 0x04, 0, 0}, + {0x4d01, 0x42, 0, 0}, + {0x4d02, 0xd1, 0, 0}, + {0x4d03, 0x93, 0, 0}, + {0x4d04, 0xf5, 0, 0}, + {0x4d05, 0xc1, 0, 0}, + {0x5000, 0xf3, 0, 0}, + {0x5001, 0x11, 0, 0}, + {0x5004, 0x00, 0, 0}, + {0x500a, 0x00, 0, 0}, + {0x500b, 0x00, 0, 0}, + {0x5032, 0x00, 0, 0}, + {0x5040, 0x00, 0, 0}, + {0x5050, 0x0c, 0, 0}, + {0x5500, 0x00, 0, 0}, + {0x5501, 0x10, 0, 0}, + {0x5502, 0x01, 0, 0}, + {0x5503, 0x0f, 0, 0}, + {0x8000, 0x00, 0, 0}, + {0x8001, 0x00, 0, 0}, + {0x8002, 0x00, 0, 0}, + {0x8003, 0x00, 0, 0}, + {0x8004, 0x00, 0, 0}, + {0x8005, 0x00, 0, 0}, + {0x8006, 0x00, 0, 0}, + {0x8007, 0x00, 0, 0}, + {0x8008, 0x00, 0, 0}, + {0x3638, 0x00, 0, 0}, +}; + +static const struct reg_value ov4689_setting_4M_2688_1520[] = { + //@@ 0 10 RES_2688x1520_default(60fps) + //102 2630 960 + {0x0103, 0x01, 0, 0}, + {0x3638, 0x00, 0, 0}, + {0x0300, 0x00, 0, 0}, + {0x0302, 0x22, 0, 0}, // 2a ;1008Mbps,23 ;; 840Mbps + {0x0304, 0x03, 0, 0}, + {0x030b, 0x00, 0, 0}, + {0x030d, 0x1e, 0, 0}, + {0x030e, 0x04, 0, 0}, + {0x030f, 0x01, 0, 0}, + {0x0312, 0x01, 0, 0}, + {0x031e, 0x00, 0, 0}, + {0x3000, 0x20, 0, 0}, + {0x3002, 0x00, 0, 0}, + {0x3018, 0x32, 0, 0}, + {0x3019, 0x0C, 0, 0}, + {0x3020, 0x93, 0, 0}, + {0x3021, 0x03, 0, 0}, + {0x3022, 0x01, 0, 0}, + {0x3031, 0x0a, 0, 0}, + {0x303f, 0x0c, 0, 0}, + {0x3305, 0xf1, 0, 0}, + {0x3307, 0x04, 0, 0}, + {0x3309, 0x29, 0, 0}, + {0x3500, 0x00, 0, 0}, + {0x3501, 0x60, 0, 0}, + {0x3502, 0x00, 0, 0}, + {0x3503, 0x04, 0, 0}, + {0x3504, 0x00, 0, 0}, + {0x3505, 0x00, 0, 0}, + {0x3506, 0x00, 0, 0}, + {0x3507, 0x00, 0, 0}, + {0x3508, 0x00, 0, 0}, + {0x3509, 0x80, 0, 0}, + {0x350a, 0x00, 0, 0}, + {0x350b, 0x00, 0, 0}, + {0x350c, 0x00, 0, 0}, + {0x350d, 0x00, 0, 0}, + {0x350e, 0x00, 0, 0}, + {0x350f, 0x80, 0, 0}, + {0x3510, 0x00, 0, 0}, + {0x3511, 0x00, 0, 0}, + {0x3512, 0x00, 0, 0}, + {0x3513, 0x00, 0, 0}, + {0x3514, 0x00, 0, 0}, + {0x3515, 0x80, 0, 0}, + {0x3516, 0x00, 0, 0}, + {0x3517, 0x00, 0, 0}, + {0x3518, 0x00, 0, 0}, + {0x3519, 0x00, 0, 0}, + {0x351a, 0x00, 0, 0}, + {0x351b, 0x80, 0, 0}, + {0x351c, 0x00, 0, 0}, + {0x351d, 0x00, 0, 0}, + {0x351e, 0x00, 0, 0}, + {0x351f, 0x00, 0, 0}, + {0x3520, 0x00, 0, 0}, + {0x3521, 0x80, 0, 0}, + {0x3522, 0x08, 0, 0}, + {0x3524, 0x08, 0, 0}, + {0x3526, 0x08, 0, 0}, + {0x3528, 0x08, 0, 0}, + {0x352a, 0x08, 0, 0}, + {0x3602, 0x00, 0, 0}, + {0x3603, 0x40, 0, 0}, + {0x3604, 0x02, 0, 0}, + {0x3605, 0x00, 0, 0}, + {0x3606, 0x00, 0, 0}, + {0x3607, 0x00, 0, 0}, + {0x3609, 0x12, 0, 0}, + {0x360a, 0x40, 0, 0}, + {0x360c, 0x08, 0, 0}, + {0x360f, 0xe5, 0, 0}, + {0x3608, 0x8f, 0, 0}, + {0x3611, 0x00, 0, 0}, + {0x3613, 0xf7, 0, 0}, + {0x3616, 0x58, 0, 0}, + {0x3619, 0x99, 0, 0}, + {0x361b, 0x60, 0, 0}, + {0x361c, 0x7a, 0, 0}, + {0x361e, 0x79, 0, 0}, + {0x361f, 0x02, 0, 0}, + {0x3632, 0x00, 0, 0}, + {0x3633, 0x10, 0, 0}, + {0x3634, 0x10, 0, 0}, + {0x3635, 0x10, 0, 0}, + {0x3636, 0x15, 0, 0}, + {0x3646, 0x86, 0, 0}, + {0x364a, 0x0b, 0, 0}, + {0x3700, 0x17, 0, 0}, + {0x3701, 0x22, 0, 0}, + {0x3703, 0x10, 0, 0}, + {0x370a, 0x37, 0, 0}, + {0x3705, 0x00, 0, 0}, + {0x3706, 0x63, 0, 0}, + {0x3709, 0x3c, 0, 0}, + {0x370b, 0x01, 0, 0}, + {0x370c, 0x30, 0, 0}, + {0x3710, 0x24, 0, 0}, + {0x3711, 0x0c, 0, 0}, + {0x3716, 0x00, 0, 0}, + {0x3720, 0x28, 0, 0}, + {0x3729, 0x7b, 0, 0}, + {0x372a, 0x84, 0, 0}, + {0x372b, 0xbd, 0, 0}, + {0x372c, 0xbc, 0, 0}, + {0x372e, 0x52, 0, 0}, + {0x373c, 0x0e, 0, 0}, + {0x373e, 0x33, 0, 0}, + {0x3743, 0x10, 0, 0}, + {0x3744, 0x88, 0, 0}, + {0x3745, 0xc0, 0, 0}, + {0x374a, 0x43, 0, 0}, + {0x374c, 0x00, 0, 0}, + {0x374e, 0x23, 0, 0}, + {0x3751, 0x7b, 0, 0}, + {0x3752, 0x84, 0, 0}, + {0x3753, 0xbd, 0, 0}, + {0x3754, 0xbc, 0, 0}, + {0x3756, 0x52, 0, 0}, + {0x375c, 0x00, 0, 0}, + {0x3760, 0x00, 0, 0}, + {0x3761, 0x00, 0, 0}, + {0x3762, 0x00, 0, 0}, + {0x3763, 0x00, 0, 0}, + {0x3764, 0x00, 0, 0}, + {0x3767, 0x04, 0, 0}, + {0x3768, 0x04, 0, 0}, + {0x3769, 0x08, 0, 0}, + {0x376a, 0x08, 0, 0}, + {0x376b, 0x20, 0, 0}, + {0x376c, 0x00, 0, 0}, + {0x376d, 0x00, 0, 0}, + {0x376e, 0x00, 0, 0}, + {0x3773, 0x00, 0, 0}, + {0x3774, 0x51, 0, 0}, + {0x3776, 0xbd, 0, 0}, + {0x3777, 0xbd, 0, 0}, + {0x3781, 0x18, 0, 0}, + {0x3783, 0x25, 0, 0}, + {0x3798, 0x1b, 0, 0}, + {0x3800, 0x00, 0, 0}, + {0x3801, 0x08, 0, 0}, + {0x3802, 0x00, 0, 0}, + {0x3803, 0x04, 0, 0}, + {0x3804, 0x0a, 0, 0}, + {0x3805, 0x97, 0, 0}, + {0x3806, 0x05, 0, 0}, + {0x3807, 0xfb, 0, 0}, + {0x3808, 0x0a, 0, 0}, + {0x3809, 0x80, 0, 0}, + {0x380a, 0x05, 0, 0}, + {0x380b, 0xf0, 0, 0}, + {0x380c, 0x03, 0, 0}, + {0x380d, 0x5c, 0, 0}, + {0x380e, 0x06, 0, 0}, + {0x380f, 0x12, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x08, 0, 0}, + {0x3812, 0x00, 0, 0}, + {0x3813, 0x04, 0, 0}, + {0x3814, 0x01, 0, 0}, + {0x3815, 0x01, 0, 0}, + {0x3819, 0x01, 0, 0}, + {0x3820, 0x00, 0, 0}, + {0x3821, 0x06, 0, 0}, + {0x3829, 0x00, 0, 0}, + {0x382a, 0x01, 0, 0}, + {0x382b, 0x01, 0, 0}, + {0x382d, 0x7f, 0, 0}, + {0x3830, 0x04, 0, 0}, + {0x3836, 0x01, 0, 0}, + {0x3837, 0x00, 0, 0}, + {0x3841, 0x02, 0, 0}, + {0x3846, 0x08, 0, 0}, + {0x3847, 0x07, 0, 0}, + {0x3d85, 0x36, 0, 0}, + {0x3d8c, 0x71, 0, 0}, + {0x3d8d, 0xcb, 0, 0}, + {0x3f0a, 0x00, 0, 0}, + {0x4000, 0x71, 0, 0}, + {0x4001, 0x40, 0, 0}, + {0x4002, 0x04, 0, 0}, + {0x4003, 0x14, 0, 0}, + {0x400e, 0x00, 0, 0}, + {0x4011, 0x00, 0, 0}, + {0x401a, 0x00, 0, 0}, + {0x401b, 0x00, 0, 0}, + {0x401c, 0x00, 0, 0}, + {0x401d, 0x00, 0, 0}, + {0x401f, 0x00, 0, 0}, + {0x4020, 0x00, 0, 0}, + {0x4021, 0x10, 0, 0}, + {0x4022, 0x07, 0, 0}, + {0x4023, 0xcf, 0, 0}, + {0x4024, 0x09, 0, 0}, + {0x4025, 0x60, 0, 0}, + {0x4026, 0x09, 0, 0}, + {0x4027, 0x6f, 0, 0}, + {0x4028, 0x00, 0, 0}, + {0x4029, 0x02, 0, 0}, + {0x402a, 0x06, 0, 0}, + {0x402b, 0x04, 0, 0}, + {0x402c, 0x02, 0, 0}, + {0x402d, 0x02, 0, 0}, + {0x402e, 0x0e, 0, 0}, + {0x402f, 0x04, 0, 0}, + {0x4302, 0xff, 0, 0}, + {0x4303, 0xff, 0, 0}, + {0x4304, 0x00, 0, 0}, + {0x4305, 0x00, 0, 0}, + {0x4306, 0x00, 0, 0}, + {0x4308, 0x02, 0, 0}, + {0x4500, 0x6c, 0, 0}, + {0x4501, 0xc4, 0, 0}, + {0x4502, 0x40, 0, 0}, + {0x4503, 0x01, 0, 0}, + {0x4601, 0x04, 0, 0}, + {0x4800, 0x04, 0, 0}, + {0x4813, 0x08, 0, 0}, + {0x481f, 0x40, 0, 0}, + {0x4829, 0x78, 0, 0}, + {0x4837, 0x14, 0, 0}, // 10 + {0x4b00, 0x2a, 0, 0}, + {0x4b0d, 0x00, 0, 0}, + {0x4d00, 0x04, 0, 0}, + {0x4d01, 0x42, 0, 0}, + {0x4d02, 0xd1, 0, 0}, + {0x4d03, 0x93, 0, 0}, + {0x4d04, 0xf5, 0, 0}, + {0x4d05, 0xc1, 0, 0}, + {0x5000, 0xf3, 0, 0}, + {0x5001, 0x11, 0, 0}, + {0x5004, 0x00, 0, 0}, + {0x500a, 0x00, 0, 0}, + {0x500b, 0x00, 0, 0}, + {0x5032, 0x00, 0, 0}, + {0x5040, 0x00, 0, 0}, + {0x5050, 0x0c, 0, 0}, + {0x5500, 0x00, 0, 0}, + {0x5501, 0x10, 0, 0}, + {0x5502, 0x01, 0, 0}, + {0x5503, 0x0f, 0, 0}, + {0x8000, 0x00, 0, 0}, + {0x8001, 0x00, 0, 0}, + {0x8002, 0x00, 0, 0}, + {0x8003, 0x00, 0, 0}, + {0x8004, 0x00, 0, 0}, + {0x8005, 0x00, 0, 0}, + {0x8006, 0x00, 0, 0}, + {0x8007, 0x00, 0, 0}, + {0x8008, 0x00, 0, 0}, + {0x3638, 0x00, 0, 0}, +// {0x0100, 0x01, 0, 0}, + +// {0x0100, 0x00, 0, 0}, + {0x380c, 0x0A, 0, 0}, // 05 + {0x380d, 0x0A, 0, 0}, // 10 + {0x380e, 0x06, 0, 0}, + {0x380f, 0x12, 0, 0}, +// {0x0100, 0x01, 0, 0}, + {0x3105, 0x31, 0, 0}, + {0x301a, 0xf9, 0, 0}, + {0x3508, 0x07, 0, 0}, + {0x484b, 0x05, 0, 0}, + {0x4805, 0x03, 0, 0}, + {0x3601, 0x01, 0, 0}, + {0x3745, 0xc0, 0, 0}, + {0x3798, 0x1b, 0, 0}, +// {0x0100, 0x01, 0, 0}, + {0xffff, 0x0a, 0, 0}, + {0x3105, 0x11, 0, 0}, + {0x301a, 0xf1, 0, 0}, + {0x4805, 0x00, 0, 0}, + {0x301a, 0xf0, 0, 0}, + {0x3208, 0x00, 0, 0}, + {0x302a, 0x00, 0, 0}, + {0x302a, 0x00, 0, 0}, + {0x302a, 0x00, 0, 0}, + {0x302a, 0x00, 0, 0}, + {0x302a, 0x00, 0, 0}, + {0x3601, 0x00, 0, 0}, + {0x3638, 0x00, 0, 0}, + {0x3208, 0x10, 0, 0}, + {0x3208, 0xa0, 0, 0}, +}; + +/* power-on sensor init reg table */ +static const struct ov4689_mode_info ov4689_mode_init_data = { + OV4689_MODE_1080P_1920_1080, SCALING, + 1920, 0x6e0, 1080, 0x470, + ov4689_init_setting_30fps_1080P, + ARRAY_SIZE(ov4689_init_setting_30fps_1080P), + OV4689_60_FPS, +}; + +static const struct ov4689_mode_info +ov4689_mode_data[OV4689_NUM_MODES] = { + {OV4689_MODE_720P_1280_720, SUBSAMPLING, + 1280, 0x408, 720, 0x305, + ov4689_setting_720P_1280_720, + ARRAY_SIZE(ov4689_setting_720P_1280_720), + OV4689_150_FPS}, + {OV4689_MODE_1080P_1920_1080, SCALING, + 1920, 0x6e0, 1080, 0x470, + ov4689_setting_1080P_1920_1080, + ARRAY_SIZE(ov4689_setting_1080P_1920_1080), + OV4689_60_FPS}, + {OV4689_MODE_4M_2688_1520, SCALING, + 2688, 0xa0a, 1520, 0x612, + ov4689_setting_4M_2688_1520, + ARRAY_SIZE(ov4689_setting_4M_2688_1520), + OV4689_60_FPS}, +}; + +static int ov4689_write_reg(struct ov4689_dev *sensor, u16 reg, u8 val) +{ + struct i2c_client *client = sensor->i2c_client; + struct i2c_msg msg; + u8 buf[3]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xff; + buf[2] = val; + + msg.addr = client->addr; + msg.flags = client->flags; + msg.buf = buf; + msg.len = sizeof(buf); + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret < 0) { + dev_err(&client->dev, "%s: error: reg=%x, val=%x\n", + __func__, reg, val); + return ret; + } + + return 0; +} + +static int ov4689_read_reg(struct ov4689_dev *sensor, u16 reg, u8 *val) +{ + struct i2c_client *client = sensor->i2c_client; + struct i2c_msg msg[2]; + u8 buf[2]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xff; + + msg[0].addr = client->addr; + msg[0].flags = client->flags; + msg[0].buf = buf; + msg[0].len = sizeof(buf); + + msg[1].addr = client->addr; + msg[1].flags = client->flags | I2C_M_RD; + msg[1].buf = buf; + msg[1].len = 1; + + ret = i2c_transfer(client->adapter, msg, 2); + if (ret < 0) { + dev_err(&client->dev, "%s: error: reg=%x\n", + __func__, reg); + return ret; + } + + *val = buf[0]; + return 0; +} + +static int ov4689_read_reg16(struct ov4689_dev *sensor, u16 reg, u16 *val) +{ + u8 hi, lo; + int ret; + + ret = ov4689_read_reg(sensor, reg, &hi); + if (ret) + return ret; + ret = ov4689_read_reg(sensor, reg + 1, &lo); + if (ret) + return ret; + + *val = ((u16)hi << 8) | (u16)lo; + return 0; +} + +static int ov4689_write_reg16(struct ov4689_dev *sensor, u16 reg, u16 val) +{ + int ret; + + ret = ov4689_write_reg(sensor, reg, val >> 8); + if (ret) + return ret; + + return ov4689_write_reg(sensor, reg + 1, val & 0xff); +} + +static int ov4689_mod_reg(struct ov4689_dev *sensor, u16 reg, + u8 mask, u8 val) +{ + u8 readval; + int ret; + + ret = ov4689_read_reg(sensor, reg, &readval); + if (ret) + return ret; + + readval &= ~mask; + val &= mask; + val |= readval; + + return ov4689_write_reg(sensor, reg, val); +} + +static int ov4689_set_timings(struct ov4689_dev *sensor, + const struct ov4689_mode_info *mode) +{ + int ret; + + return 0; +} + +static int ov4689_load_regs(struct ov4689_dev *sensor, + const struct ov4689_mode_info *mode) +{ + const struct reg_value *regs = mode->reg_data; + unsigned int i; + u32 delay_ms; + u16 reg_addr; + u8 mask, val; + int ret = 0; + + st_info(ST_SENSOR, "%s, mode = 0x%x\n", __func__, mode->id); + for (i = 0; i < mode->reg_data_size; ++i, ++regs) { + delay_ms = regs->delay_ms; + reg_addr = regs->reg_addr; + val = regs->val; + mask = regs->mask; + + if (mask) + ret = ov4689_mod_reg(sensor, reg_addr, mask, val); + else + ret = ov4689_write_reg(sensor, reg_addr, val); + if (ret) + break; + + if (delay_ms) + usleep_range(1000 * delay_ms, 1000 * delay_ms + 100); + } + + return ov4689_set_timings(sensor, mode); +} + +static int ov4689_get_exposure(struct ov4689_dev *sensor) +{ + int exp, ret; + u8 temp; + + ret = ov4689_read_reg(sensor, OV4689_REG_EXPOSURE_HI, &temp); + if (ret) + return ret; + exp = ((int)temp & 0x0f) << 16; + ret = ov4689_read_reg(sensor, OV4689_REG_EXPOSURE_MED, &temp); + if (ret) + return ret; + exp |= ((int)temp << 8); + ret = ov4689_read_reg(sensor, OV4689_REG_EXPOSURE_LO, &temp); + if (ret) + return ret; + exp |= (int)temp; + + return exp >> 4; +} + +static int ov4689_set_exposure(struct ov4689_dev *sensor, u32 exposure) +{ + int ret; + + st_info(ST_SENSOR, "%s, exposure = 0x%x\n", __func__, exposure); + exposure <<= 4; + + ret = ov4689_write_reg(sensor, + OV4689_REG_EXPOSURE_LO, + exposure & 0xff); + if (ret) + return ret; + ret = ov4689_write_reg(sensor, + OV4689_REG_EXPOSURE_MED, + (exposure >> 8) & 0xff); + if (ret) + return ret; + return ov4689_write_reg(sensor, + OV4689_REG_EXPOSURE_HI, + (exposure >> 16) & 0x0f); +} + +static int ov4689_get_gain(struct ov4689_dev *sensor) +{ + u32 gain = 0; + u8 val; + + ov4689_read_reg(sensor, OV4689_REG_GAIN_H, &val); + gain = (val & 0x3) << 16; + ov4689_read_reg(sensor, OV4689_REG_GAIN_M, &val); + gain |= val << 8; + ov4689_read_reg(sensor, OV4689_REG_GAIN_L, &val); + gain |= val; + + return gain; +} + +static int ov4689_set_gain(struct ov4689_dev *sensor, int gain) +{ + u8 val; + + ov4689_write_reg(sensor, OV4689_REG_GAIN_H, + (gain >> 16) & 0x3); + ov4689_write_reg(sensor, OV4689_REG_GAIN_M, + (gain >> 8) & 0xff); + ov4689_write_reg(sensor, OV4689_REG_GAIN_L, + gain & 0xff); + return 0; +} + +static int ov4689_set_stream_mipi(struct ov4689_dev *sensor, bool on) +{ + return 0; +} + +static int ov4689_get_sysclk(struct ov4689_dev *sensor) +{ + return 0; +} + +static int ov4689_set_night_mode(struct ov4689_dev *sensor) +{ + return 0; +} + +static int ov4689_get_hts(struct ov4689_dev *sensor) +{ + /* read HTS from register settings */ + u16 hts; + int ret; + + ret = ov4689_read_reg16(sensor, OV4689_REG_TIMING_HTS, &hts); + if (ret) + return ret; + return hts; +} + +static int ov4689_get_vts(struct ov4689_dev *sensor) +{ + u16 vts; + int ret; + + ret = ov4689_read_reg16(sensor, OV4689_REG_TIMING_VTS, &vts); + if (ret) + return ret; + return vts; +} + +static int ov4689_set_vts(struct ov4689_dev *sensor, int vts) +{ + return ov4689_write_reg16(sensor, OV4689_REG_TIMING_VTS, vts); +} + +static int ov4689_get_light_freq(struct ov4689_dev *sensor) +{ + return 0; +} + +static int ov4689_set_bandingfilter(struct ov4689_dev *sensor) +{ + return 0; +} + +static int ov4689_set_ae_target(struct ov4689_dev *sensor, int target) +{ + return 0; +} + +static int ov4689_get_binning(struct ov4689_dev *sensor) +{ + return 0; +} + +static int ov4689_set_binning(struct ov4689_dev *sensor, bool enable) +{ + return 0; +} + +static const struct ov4689_mode_info * +ov4689_find_mode(struct ov4689_dev *sensor, enum ov4689_frame_rate fr, + int width, int height, bool nearest) +{ + const struct ov4689_mode_info *mode; + + mode = v4l2_find_nearest_size(ov4689_mode_data, + ARRAY_SIZE(ov4689_mode_data), + hact, vact, + width, height); + + if (!mode || + (!nearest && (mode->hact != width || mode->vact != height))) + return NULL; + + /* Check to see if the current mode exceeds the max frame rate */ + if (ov4689_framerates[fr] > ov4689_framerates[mode->max_fps]) + return NULL; + + return mode; +} + +static u64 ov4689_calc_pixel_rate(struct ov4689_dev *sensor) +{ + u64 rate; + + rate = sensor->current_mode->vact * sensor->current_mode->hact; + rate *= ov4689_framerates[sensor->current_fr]; + + return rate; +} + +/* + * After trying the various combinations, reading various + * documentations spread around the net, and from the various + * feedback, the clock tree is probably as follows: + * + * +--------------+ + * | Ext. Clock | + * +-+------------+ + * | +----------+ + * +->| PLL1 | - reg 0x030a, bit0 for the pre-dividerp + * +-+--------+ - reg 0x0300, bits 0-2 for the pre-divider + * +-+--------+ - reg 0x0301~0x0302, for the multiplier + * | +--------------+ + * +->| MIPI Divider | - reg 0x0303, bits 0-3 for the pre-divider + * | +---------> MIPI PHY CLK + * | +-----+ + * | +->| PLL1_DIV_MIPI | - reg 0x0304, bits 0-1 for the divider + * | +----------------> PCLK + * | +-----+ + * + * +--------------+ + * | Ext. Clock | + * +-+------------+ + * | +----------+ + * +->| PLL2 | - reg 0x0311, bit0 for the pre-dividerp + * +-+--------+ - reg 0x030b, bits 0-2 for the pre-divider + * +-+--------+ - reg 0x030c~0x030d, for the multiplier + * | +--------------+ + * +->| SCLK Divider | - reg 0x030F, bits 0-3 for the pre-divider + * +-+--------+ - reg 0x030E, bits 0-2 for the divider + * | +---------> SCLK + * + * | +-----+ + * +->| DAC Divider | - reg 0x0312, bits 0-3 for the divider + * | +----------------> DACCLK + ** + */ + +/* + * ov4689_set_mipi_pclk() - Calculate the clock tree configuration values + * for the MIPI CSI-2 output. + * + * @rate: The requested bandwidth per lane in bytes per second. + * 'Bandwidth Per Lane' is calculated as: + * bpl = HTOT * VTOT * FPS * bpp / num_lanes; + * + * This function use the requested bandwidth to calculate: + * + * - mipi_pclk = bpl / 2; ( / 2 is for CSI-2 DDR) + * - mipi_phy_clk = mipi_pclk * PLL1_DIV_MIPI; + * + * with these fixed parameters: + * PLL1_PREDIVP = 1; + * PLL1_PREDIV = 1; (MIPI_BIT_MODE == 8 ? 2 : 2,5); + * PLL1_DIVM = 1; + * PLL1_DIV_MIPI = 4; + * + * FIXME: this have been tested with 10-bit raw and 2 lanes setup only. + * MIPI_DIV is fixed to value 2, but it -might- be changed according to the + * above formula for setups with 1 lane or image formats with different bpp. + * + * FIXME: this deviates from the sensor manual documentation which is quite + * thin on the MIPI clock tree generation part. + */ + +#define PLL1_PREDIVP 1 // bypass +#define PLL1_PREDIV 1 // bypass +#define PLL1_DIVM 1 // bypass +#define PLL1_DIV_MIPI 3 // div +#define PLL1_DIV_MIPI_BASE 1 // div + +#define PLL1_DIVSP 1 // no use +#define PLL1_DIVS 1 // no use + +#define PLL2_PREDIVP 0 +#define PLL2_PREDIV 0 +#define PLL2_DIVSP 1 +#define PLL2_DIVS 4 +#define PLL2_DIVDAC 1 + +#define OV4689_PLL1_PREDIVP 0x030a // bits[0] +#define OV4689_PLL1_PREDIV 0x0300 // bits[2:0] +#define OV4689_PLL1_MULTIPLIER 0x0301 // bits[9:8] 0x0302 bits[7:0] +#define OV4689_PLL1_DIVM 0x0303 // bits[3:0] +#define OV4689_PLL1_DIV_MIPI 0x0304 // bits[1:0] + +#define OV4689_PLL1_DIVSP 0x0305 //bits[1:0] +#define OV4689_PLL1_DIVS 0x0306 // bits[0] + +#define OV4689_PLL2_PREDIVP 0x0311 // bits[0] +#define OV4689_PLL2_PREDIV 0x030b // bits[2:0] +#define OV4689_PLL2_MULTIPLIER 0x030c // bits[9:8] 0x030d bits[7:0] +#define OV4689_PLL2_DIVSP 0x030f // bits[3:0] +#define OV4689_PLL2_DIVS 0x030e // bits[2:0] +#define OV4689_PLL2_DIVDAC 0x0312 // bits[3:0] + +#define OV4689_TIMING_HTS 0x380c + +static int ov4689_set_mipi_pclk(struct ov4689_dev *sensor, + unsigned long rate) +{ + const struct ov4689_mode_info *mode = sensor->current_mode; + const struct ov4689_mode_info *orig_mode = sensor->last_mode; + u8 mult, val; + int ret = 0; + int fps = ov4689_framerates[sensor->current_fr]; + u16 htot, val16; + + htot = mode->htot * ov4689_framerates[mode->max_fps] / fps; + + ret = ov4689_write_reg16(sensor, OV4689_TIMING_HTS, htot); + + ret = ov4689_read_reg(sensor, OV4689_TIMING_HTS, &val); + val16 = val << 8; + ret = ov4689_read_reg(sensor, OV4689_TIMING_HTS + 1, &val); + val16 |= val; + st_info(ST_SENSOR, "fps = %d, max_fps = %d, mode->htot = 0x%x, " + "htot = 0x%x, 0x%x = 0x%x\n", + fps, mode->max_fps, mode->htot, + htot, OV4689_TIMING_HTS, val16); + return 0; +} + +/* + * if sensor changes inside scaling or subsampling + * change mode directly + */ +static int ov4689_set_mode_direct(struct ov4689_dev *sensor, + const struct ov4689_mode_info *mode) +{ + if (!mode->reg_data) + return -EINVAL; + + /* Write capture setting */ + return ov4689_load_regs(sensor, mode); +} + +static int ov4689_set_mode(struct ov4689_dev *sensor) +{ + const struct ov4689_mode_info *mode = sensor->current_mode; + const struct ov4689_mode_info *orig_mode = sensor->last_mode; + int ret = 0; + + ret = ov4689_set_mode_direct(sensor, mode); + if (ret < 0) + return ret; + + /* + * we support have 10 bits raw RGB(mipi) + */ + if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) + ret = ov4689_set_mipi_pclk(sensor, 0); + + if (ret < 0) + return 0; + + sensor->pending_mode_change = false; + sensor->last_mode = mode; + return 0; +} + +/* restore the last set video mode after chip power-on */ +static int ov4689_restore_mode(struct ov4689_dev *sensor) +{ + int ret; + + /* first load the initial register values */ + ret = ov4689_load_regs(sensor, &ov4689_mode_init_data); + if (ret < 0) + return ret; + sensor->last_mode = &ov4689_mode_init_data; + + /* now restore the last capture mode */ + ret = ov4689_set_mode(sensor); + if (ret < 0) + return ret; + + return ret; +} + +static void ov4689_power(struct ov4689_dev *sensor, bool enable) +{ + if (!sensor->pwdn_gpio) + return; + gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1); +} + +static void ov4689_reset(struct ov4689_dev *sensor) +{ + if (!sensor->reset_gpio) + return; + + gpiod_set_value_cansleep(sensor->reset_gpio, 0); + + usleep_range(5000, 25000); + + gpiod_set_value_cansleep(sensor->reset_gpio, 1); + usleep_range(1000, 2000); +} + +static int ov4689_set_power_on(struct ov4689_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + int ret; + + ret = clk_prepare_enable(sensor->xclk); + if (ret) { + dev_err(&client->dev, "%s: failed to enable clock\n", + __func__); + return ret; + } + + ret = regulator_bulk_enable(OV4689_NUM_SUPPLIES, + sensor->supplies); + if (ret) { + dev_err(&client->dev, "%s: failed to enable regulators\n", + __func__); + goto xclk_off; + } + + ov4689_reset(sensor); + ov4689_power(sensor, true); + + return 0; + +xclk_off: + clk_disable_unprepare(sensor->xclk); + return ret; +} + +static void ov4689_set_power_off(struct ov4689_dev *sensor) +{ + ov4689_power(sensor, false); + regulator_bulk_disable(OV4689_NUM_SUPPLIES, sensor->supplies); + clk_disable_unprepare(sensor->xclk); +} + +static int ov4689_set_power_mipi(struct ov4689_dev *sensor, bool on) +{ + return 0; +} + +static int ov4689_set_power(struct ov4689_dev *sensor, bool on) +{ + int ret = 0; + u16 chip_id; + + if (on) { + ret = ov4689_set_power_on(sensor); + if (ret) + return ret; + + ret = ov4689_read_reg16(sensor, OV4689_REG_CHIP_ID, &chip_id); + if (ret) { + dev_err(&sensor->i2c_client->dev, "%s: failed to read chip identifier\n", + __func__); + ret = -ENODEV; + goto power_off; + } + + if (chip_id != OV4689_CHIP_ID) { + dev_err(&sensor->i2c_client->dev, + "%s: wrong chip identifier, expected 0x%x, got 0x%x\n", + __func__, OV4689_CHIP_ID, chip_id); + ret = -ENXIO; + goto power_off; + } + dev_err(&sensor->i2c_client->dev, "%s: chip identifier, got 0x%x\n", + __func__, chip_id); + + ret = ov4689_restore_mode(sensor); + if (ret) + goto power_off; + } + + if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) + ret = ov4689_set_power_mipi(sensor, on); + if (ret) + goto power_off; + + if (!on) + ov4689_set_power_off(sensor); + + return 0; + +power_off: + ov4689_set_power_off(sensor); + return ret; +} + +static int ov4689_s_power(struct v4l2_subdev *sd, int on) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + int ret = 0; + + mutex_lock(&sensor->lock); + + /* + * If the power count is modified from 0 to != 0 or from != 0 to 0, + * update the power state. + */ + if (sensor->power_count == !on) { + ret = ov4689_set_power(sensor, !!on); + if (ret) + goto out; + } + + /* Update the power count. */ + sensor->power_count += on ? 1 : -1; + WARN_ON(sensor->power_count < 0); +out: + mutex_unlock(&sensor->lock); + + if (on && !ret && sensor->power_count == 1) { + /* restore controls */ + ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler); + } + + return ret; +} + +static int ov4689_try_frame_interval(struct ov4689_dev *sensor, + struct v4l2_fract *fi, + u32 width, u32 height) +{ + const struct ov4689_mode_info *mode; + enum ov4689_frame_rate rate = OV4689_15_FPS; + int minfps, maxfps, best_fps, fps; + int i; + + minfps = ov4689_framerates[OV4689_15_FPS]; + maxfps = ov4689_framerates[OV4689_NUM_FRAMERATES - 1]; + + if (fi->numerator == 0) { + fi->denominator = maxfps; + fi->numerator = 1; + rate = OV4689_60_FPS; + goto find_mode; + } + + fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator), + minfps, maxfps); + + best_fps = minfps; + for (i = 0; i < ARRAY_SIZE(ov4689_framerates); i++) { + int curr_fps = ov4689_framerates[i]; + if (abs(curr_fps - fps) < abs(best_fps - fps)) { + best_fps = curr_fps; + rate = i; + } + } + st_info(ST_SENSOR, "best_fps = %d, fps = %d\n", best_fps, fps); + + fi->numerator = 1; + fi->denominator = best_fps; + +find_mode: + mode = ov4689_find_mode(sensor, rate, width, height, false); + return mode ? rate : -EINVAL; +} + +static int ov4689_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->pad != 0) + return -EINVAL; + + if (code->index) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_SBGGR10_1X10; + return 0; +} + +static int ov4689_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + struct v4l2_mbus_framefmt *fmt; + + if (format->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg, + format->pad); + else + fmt = &sensor->fmt; + + format->format = *fmt; + + mutex_unlock(&sensor->lock); + + return 0; +} + +static int ov4689_try_fmt_internal(struct v4l2_subdev *sd, + struct v4l2_mbus_framefmt *fmt, + enum ov4689_frame_rate fr, + const struct ov4689_mode_info **new_mode) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + const struct ov4689_mode_info *mode; + int i; + + mode = ov4689_find_mode(sensor, fr, fmt->width, fmt->height, true); + if (!mode) + return -EINVAL; + fmt->width = mode->hact; + fmt->height = mode->vact; + + if (new_mode) + *new_mode = mode; + + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + + return 0; +} + +static int ov4689_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + const struct ov4689_mode_info *new_mode; + struct v4l2_mbus_framefmt *mbus_fmt = &format->format; + struct v4l2_mbus_framefmt *fmt; + int ret; + + if (format->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (sensor->streaming) { + ret = -EBUSY; + goto out; + } + + ret = ov4689_try_fmt_internal(sd, mbus_fmt, 0, &new_mode); + if (ret) + goto out; + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + fmt = v4l2_subdev_get_try_format(sd, cfg, 0); + else + fmt = &sensor->fmt; + + *fmt = *mbus_fmt; + + if (new_mode != sensor->current_mode) { + sensor->current_mode = new_mode; + sensor->pending_mode_change = true; + } + if (new_mode->max_fps < sensor->current_fr) { + sensor->current_fr = new_mode->max_fps; + sensor->frame_interval.numerator = 1; + sensor->frame_interval.denominator = + ov4689_framerates[sensor->current_fr]; + sensor->current_mode = new_mode; + sensor->pending_mode_change = true; + } + + __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, + ov4689_calc_pixel_rate(sensor)); +out: + mutex_unlock(&sensor->lock); + return ret; +} + +/* + * Sensor Controls. + */ + +static int ov4689_set_ctrl_hue(struct ov4689_dev *sensor, int value) +{ + int ret = 0; + + return ret; +} + +static int ov4689_set_ctrl_contrast(struct ov4689_dev *sensor, int value) +{ + int ret = 0; + + return ret; +} + +static int ov4689_set_ctrl_saturation(struct ov4689_dev *sensor, int value) +{ + int ret = 0; + + return ret; +} + +static int ov4689_set_ctrl_white_balance(struct ov4689_dev *sensor, int awb) +{ + struct ov4689_ctrls *ctrls = &sensor->ctrls; + int ret = 0; + + if (!awb && (ctrls->red_balance->is_new + || ctrls->blue_balance->is_new)) { + u16 red = (u16)ctrls->red_balance->val; + u16 blue = (u16)ctrls->blue_balance->val; + + st_info(ST_SENSOR, "red = 0x%x, blue = 0x%x\n", red, blue); + ret = ov4689_write_reg16(sensor, OV4689_REG_AWB_R_GAIN, red); + if (ret) + return ret; + ret = ov4689_write_reg16(sensor, OV4689_REG_AWB_B_GAIN, blue); + } + return ret; +} + +static int ov4689_set_ctrl_exposure(struct ov4689_dev *sensor, + enum v4l2_exposure_auto_type auto_exposure) +{ + struct ov4689_ctrls *ctrls = &sensor->ctrls; + bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO); + int ret = 0; + + if (!auto_exp && ctrls->exposure->is_new) { + u16 max_exp = 0; + + ret = ov4689_read_reg16(sensor, OV4689_REG_V_OUTPUT_SIZE, + &max_exp); + + ret = ov4689_get_vts(sensor); + if (ret < 0) + return ret; + max_exp += ret; + ret = 0; + + st_info(ST_SENSOR, "%s, max_exp = 0x%x\n", __func__, max_exp); + if (ctrls->exposure->val < max_exp) + ret = ov4689_set_exposure(sensor, ctrls->exposure->val); + } + + return ret; +} + +static const s64 link_freq_menu_items[] = { + OV4689_LINK_FREQ_500MHZ +}; + +static const char * const test_pattern_menu[] = { + "Disabled", + "Color bars", + "Color bars w/ rolling bar", + "Color squares", + "Color squares w/ rolling bar", +}; + +#define OV4689_TEST_ENABLE BIT(7) +#define OV4689_TEST_ROLLING BIT(6) /* rolling horizontal bar */ +#define OV4689_TEST_TRANSPARENT BIT(5) +#define OV4689_TEST_SQUARE_BW BIT(4) /* black & white squares */ +#define OV4689_TEST_BAR_STANDARD (0 << 2) +#define OV4689_TEST_BAR_DARKER_1 (1 << 2) +#define OV4689_TEST_BAR_DARKER_2 (2 << 2) +#define OV4689_TEST_BAR_DARKER_3 (3 << 2) +#define OV4689_TEST_BAR (0 << 0) +#define OV4689_TEST_RANDOM (1 << 0) +#define OV4689_TEST_SQUARE (2 << 0) +#define OV4689_TEST_BLACK (3 << 0) + +static const u8 test_pattern_val[] = { + 0, + OV4689_TEST_ENABLE | OV4689_TEST_BAR_STANDARD | + OV4689_TEST_BAR, + OV4689_TEST_ENABLE | OV4689_TEST_ROLLING | + OV4689_TEST_BAR_DARKER_1 | OV4689_TEST_BAR, + OV4689_TEST_ENABLE | OV4689_TEST_SQUARE, + OV4689_TEST_ENABLE | OV4689_TEST_ROLLING | OV4689_TEST_SQUARE, +}; + +static int ov4689_set_ctrl_test_pattern(struct ov4689_dev *sensor, int value) +{ + return ov4689_write_reg(sensor, OV4689_REG_TEST_PATTERN, + test_pattern_val[value]); +} + +static int ov4689_set_ctrl_light_freq(struct ov4689_dev *sensor, int value) +{ + return 0; +} + +static int ov4689_set_ctrl_hflip(struct ov4689_dev *sensor, int value) +{ + /* + * TIMING TC REG21: + * - [2]: Digital mirror + * - [1]: Array mirror + */ + return ov4689_mod_reg(sensor, OV4689_REG_TIMING_TC_REG21, + BIT(2) | BIT(1), + (!(value ^ sensor->upside_down)) ? + (BIT(2) | BIT(1)) : 0); +} + +static int ov4689_set_ctrl_vflip(struct ov4689_dev *sensor, int value) +{ + /* + * TIMING TC REG20: + * - [2]: Digital vflip + * - [1]: Array vflip + */ + return ov4689_mod_reg(sensor, OV4689_REG_TIMING_TC_REG20, + BIT(2) | BIT(1), + (value ^ sensor->upside_down) ? + (BIT(2) | BIT(1)) : 0); +} + +static int ov4689_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = ctrl_to_sd(ctrl); + struct ov4689_dev *sensor = to_ov4689_dev(sd); + int val; + + /* v4l2_ctrl_lock() locks our own mutex */ + + switch (ctrl->id) { + case V4L2_CID_ANALOGUE_GAIN: + val = ov4689_get_gain(sensor); + break; + } + + return 0; +} + +static int ov4689_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = ctrl_to_sd(ctrl); + struct ov4689_dev *sensor = to_ov4689_dev(sd); + int ret; + + /* v4l2_ctrl_lock() locks our own mutex */ + + /* + * If the device is not powered up by the host driver do + * not apply any controls to H/W at this time. Instead + * the controls will be restored right after power-up. + */ + if (sensor->power_count == 0) + return 0; + + switch (ctrl->id) { + case V4L2_CID_ANALOGUE_GAIN: + ret = ov4689_set_gain(sensor, ctrl->val); + break; + case V4L2_CID_EXPOSURE: + ret = ov4689_set_ctrl_exposure(sensor, V4L2_EXPOSURE_MANUAL); + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + ret = ov4689_set_ctrl_white_balance(sensor, ctrl->val); + break; + case V4L2_CID_HUE: + ret = ov4689_set_ctrl_hue(sensor, ctrl->val); + break; + case V4L2_CID_CONTRAST: + ret = ov4689_set_ctrl_contrast(sensor, ctrl->val); + break; + case V4L2_CID_SATURATION: + ret = ov4689_set_ctrl_saturation(sensor, ctrl->val); + break; + case V4L2_CID_TEST_PATTERN: + ret = ov4689_set_ctrl_test_pattern(sensor, ctrl->val); + break; + case V4L2_CID_POWER_LINE_FREQUENCY: + ret = ov4689_set_ctrl_light_freq(sensor, ctrl->val); + break; + case V4L2_CID_HFLIP: + ret = ov4689_set_ctrl_hflip(sensor, ctrl->val); + break; + case V4L2_CID_VFLIP: + ret = ov4689_set_ctrl_vflip(sensor, ctrl->val); + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ov4689_ctrl_ops = { + .g_volatile_ctrl = ov4689_g_volatile_ctrl, + .s_ctrl = ov4689_s_ctrl, +}; + +static int ov4689_init_controls(struct ov4689_dev *sensor) +{ + const struct v4l2_ctrl_ops *ops = &ov4689_ctrl_ops; + struct ov4689_ctrls *ctrls = &sensor->ctrls; + struct v4l2_ctrl_handler *hdl = &ctrls->handler; + int ret; + + v4l2_ctrl_handler_init(hdl, 32); + + /* we can use our own mutex for the ctrl lock */ + hdl->lock = &sensor->lock; + + /* Clock related controls */ + ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE, + 0, INT_MAX, 1, + ov4689_calc_pixel_rate(sensor)); + + /* Auto/manual white balance */ + ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops, + V4L2_CID_AUTO_WHITE_BALANCE, + 0, 1, 1, 0); + ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE, + 0, 4095, 1, 1024); + ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE, + 0, 4095, 1, 1024); + + ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, + 4, 0xfff8, 1, 0x4c00); + ctrls->anal_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, + 0x10, 0xfff8, 1, 0x0080); + ctrls->test_pattern = + v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(test_pattern_menu) - 1, + 0, 0, test_pattern_menu); + ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, + 0, 1, 1, 0); + ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, + 0, 1, 1, 0); + ctrls->light_freq = + v4l2_ctrl_new_std_menu(hdl, ops, + V4L2_CID_POWER_LINE_FREQUENCY, + V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, + V4L2_CID_POWER_LINE_FREQUENCY_50HZ); + ctrls->link_freq = v4l2_ctrl_new_int_menu(hdl, ops, V4L2_CID_LINK_FREQ, + 0, 0, link_freq_menu_items); + if (hdl->error) { + ret = hdl->error; + goto free_ctrls; + } + + ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY; + ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; + // ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE; + // ctrls->anal_gain->flags |= V4L2_CTRL_FLAG_VOLATILE; + + v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false); + + sensor->sd.ctrl_handler = hdl; + return 0; + +free_ctrls: + v4l2_ctrl_handler_free(hdl); + return ret; +} + +static int ov4689_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + if (fse->pad != 0) + return -EINVAL; + if (fse->index >= OV4689_NUM_MODES) + return -EINVAL; + + fse->min_width = + ov4689_mode_data[fse->index].hact; + fse->max_width = fse->min_width; + fse->min_height = + ov4689_mode_data[fse->index].vact; + fse->max_height = fse->min_height; + + return 0; +} + +static int ov4689_enum_frame_interval( + struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_interval_enum *fie) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + struct v4l2_fract tpf; + int ret; + + if (fie->pad != 0) + return -EINVAL; + if (fie->index >= OV4689_NUM_FRAMERATES) + return -EINVAL; + + tpf.numerator = 1; + tpf.denominator = ov4689_framerates[fie->index]; + +/* ret = ov4689_try_frame_interval(sensor, &tpf, + fie->width, fie->height); + if (ret < 0) + return -EINVAL; +*/ + fie->interval = tpf; + + return 0; +} + +static int ov4689_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *fi) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + + mutex_lock(&sensor->lock); + fi->interval = sensor->frame_interval; + mutex_unlock(&sensor->lock); + + return 0; +} + +static int ov4689_s_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *fi) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + const struct ov4689_mode_info *mode; + int frame_rate, ret = 0; + + if (fi->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (sensor->streaming) { + ret = -EBUSY; + goto out; + } + + mode = sensor->current_mode; + + frame_rate = ov4689_try_frame_interval(sensor, &fi->interval, + mode->hact, mode->vact); + if (frame_rate < 0) { + /* Always return a valid frame interval value */ + fi->interval = sensor->frame_interval; + goto out; + } + + mode = ov4689_find_mode(sensor, frame_rate, mode->hact, + mode->vact, true); + if (!mode) { + ret = -EINVAL; + goto out; + } + + if (mode != sensor->current_mode || + frame_rate != sensor->current_fr) { + sensor->current_fr = frame_rate; + sensor->frame_interval = fi->interval; + sensor->current_mode = mode; + sensor->pending_mode_change = true; + + __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, + ov4689_calc_pixel_rate(sensor)); + } +out: + mutex_unlock(&sensor->lock); + return ret; +} + +static int ov4689_stream_start(struct ov4689_dev *sensor, int enable) +{ + u8 val; + int result = ov4689_write_reg(sensor, 0x100, enable); + + ov4689_read_reg(sensor, 0x100, &val); + mdelay(200); + return result; +} + +static int ov4689_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov4689_dev *sensor = to_ov4689_dev(sd); + int ret = 0; + + mutex_lock(&sensor->lock); + + if (sensor->streaming == !enable) { + if (enable && sensor->pending_mode_change) { + ret = ov4689_set_mode(sensor); + if (ret) + goto out; + } + + if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) + ret = ov4689_set_stream_mipi(sensor, enable); + + ret = ov4689_stream_start(sensor, enable); + + if (!ret) + sensor->streaming = enable; + } +out: + mutex_unlock(&sensor->lock); + return ret; +} + +static const struct v4l2_subdev_core_ops ov4689_core_ops = { + .s_power = ov4689_s_power, + .log_status = v4l2_ctrl_subdev_log_status, + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_video_ops ov4689_video_ops = { + .g_frame_interval = ov4689_g_frame_interval, + .s_frame_interval = ov4689_s_frame_interval, + .s_stream = ov4689_s_stream, +}; + +static const struct v4l2_subdev_pad_ops ov4689_pad_ops = { + .enum_mbus_code = ov4689_enum_mbus_code, + .get_fmt = ov4689_get_fmt, + .set_fmt = ov4689_set_fmt, + .enum_frame_size = ov4689_enum_frame_size, + .enum_frame_interval = ov4689_enum_frame_interval, +}; + +static const struct v4l2_subdev_ops ov4689_subdev_ops = { + .core = &ov4689_core_ops, + .video = &ov4689_video_ops, + .pad = &ov4689_pad_ops, +}; + +static int ov4689_get_regulators(struct ov4689_dev *sensor) +{ + int i; + + for (i = 0; i < OV4689_NUM_SUPPLIES; i++) + sensor->supplies[i].supply = ov4689_supply_name[i]; + + return devm_regulator_bulk_get(&sensor->i2c_client->dev, + OV4689_NUM_SUPPLIES, + sensor->supplies); +} + +static int ov4689_check_chip_id(struct ov4689_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + int ret = 0; + u16 chip_id; + + ret = ov4689_set_power_on(sensor); + if (ret) + return ret; + + ret = ov4689_read_reg16(sensor, OV4689_REG_CHIP_ID, &chip_id); + if (ret) { + dev_err(&client->dev, "%s: failed to read chip identifier\n", + __func__); + goto power_off; + } + + if (chip_id != OV4689_CHIP_ID) { + dev_err(&client->dev, "%s: wrong chip identifier, expected 0x%x, got 0x%x\n", + __func__, OV4689_CHIP_ID, chip_id); + ret = -ENXIO; + } + dev_err(&client->dev, "%s: chip identifier, got 0x%x\n", + __func__, chip_id); + +power_off: + ov4689_set_power_off(sensor); + return ret; +} + +static int ov4689_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct fwnode_handle *endpoint; + struct ov4689_dev *sensor; + struct v4l2_mbus_framefmt *fmt; + u32 rotation; + int ret; + u8 chip_id_high, chip_id_low; + + sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOMEM; + + sensor->i2c_client = client; + + fmt = &sensor->fmt; + fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; + fmt->colorspace = V4L2_COLORSPACE_SRGB; + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); + fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); + fmt->width = 1920; + fmt->height = 1080; + fmt->field = V4L2_FIELD_NONE; + sensor->frame_interval.numerator = 1; + sensor->frame_interval.denominator = ov4689_framerates[OV4689_30_FPS]; + sensor->current_fr = OV4689_30_FPS; + sensor->current_mode = + &ov4689_mode_data[OV4689_MODE_1080P_1920_1080]; + sensor->last_mode = sensor->current_mode; + + sensor->ae_target = 52; + + /* optional indication of physical rotation of sensor */ + ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation", + &rotation); + if (!ret) { + switch (rotation) { + case 180: + sensor->upside_down = true; + fallthrough; + case 0: + break; + default: + dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n", + rotation); + } + } + + endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), + NULL); + if (!endpoint) { + dev_err(dev, "endpoint node not found\n"); + return -EINVAL; + } + + ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep); + fwnode_handle_put(endpoint); + if (ret) { + dev_err(dev, "Could not parse endpoint\n"); + return ret; + } + + if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL && + sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY && + sensor->ep.bus_type != V4L2_MBUS_BT656) { + dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type); + return -EINVAL; + } + + /* get system clock (xclk) */ + sensor->xclk = devm_clk_get(dev, "xclk"); + if (IS_ERR(sensor->xclk)) { + dev_err(dev, "failed to get xclk\n"); + return PTR_ERR(sensor->xclk); + } + + sensor->xclk_freq = clk_get_rate(sensor->xclk); + if (sensor->xclk_freq < OV4689_XCLK_MIN || + sensor->xclk_freq > OV4689_XCLK_MAX) { + dev_err(dev, "xclk frequency out of range: %d Hz\n", + sensor->xclk_freq); + return -EINVAL; + } + + /* request optional power down pin */ + sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown", + GPIOD_OUT_HIGH); + if (IS_ERR(sensor->pwdn_gpio)) + return PTR_ERR(sensor->pwdn_gpio); + + /* request optional reset pin */ + sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(sensor->reset_gpio)) + return PTR_ERR(sensor->reset_gpio); + + v4l2_i2c_subdev_init(&sensor->sd, client, &ov4689_subdev_ops); + + sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | + V4L2_SUBDEV_FL_HAS_EVENTS; + sensor->pad.flags = MEDIA_PAD_FL_SOURCE; + sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); + if (ret) + return ret; + + ret = ov4689_get_regulators(sensor); + if (ret) + return ret; + + mutex_init(&sensor->lock); + + ret = ov4689_check_chip_id(sensor); + if (ret) + goto entity_cleanup; + + ret = ov4689_init_controls(sensor); + if (ret) + goto entity_cleanup; + + ret = v4l2_async_register_subdev_sensor_common(&sensor->sd); + if (ret) + goto free_ctrls; + + return 0; + +free_ctrls: + v4l2_ctrl_handler_free(&sensor->ctrls.handler); +entity_cleanup: + media_entity_cleanup(&sensor->sd.entity); + mutex_destroy(&sensor->lock); + return ret; +} + +static int ov4689_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov4689_dev *sensor = to_ov4689_dev(sd); + + v4l2_async_unregister_subdev(&sensor->sd); + media_entity_cleanup(&sensor->sd.entity); + v4l2_ctrl_handler_free(&sensor->ctrls.handler); + mutex_destroy(&sensor->lock); + + return 0; +} + +static const struct i2c_device_id ov4689_id[] = { + {"ov4689", 0}, + {}, +}; +MODULE_DEVICE_TABLE(i2c, ov4689_id); + +static const struct of_device_id ov4689_dt_ids[] = { + { .compatible = "ovti,ov4689" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ov4689_dt_ids); + +static struct i2c_driver ov4689_i2c_driver = { + .driver = { + .name = "ov4689", + .of_match_table = ov4689_dt_ids, + }, + .id_table = ov4689_id, + .probe_new = ov4689_probe, + .remove = ov4689_remove, +}; + +module_i2c_driver(ov4689_i2c_driver); + +MODULE_DESCRIPTION("OV4689 MIPI Camera Subdev Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/platform/starfive/v4l2_driver/ov5640.c b/drivers/media/platform/starfive/v4l2_driver/ov5640.c new file mode 100755 index 0000000..fa70750 --- /dev/null +++ b/drivers/media/platform/starfive/v4l2_driver/ov5640.c @@ -0,0 +1,3225 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2014-2017 Mentor Graphics Inc. + * Copyright (C) 2021 StarFive Technology Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "stfcamss.h" + +/* min/typical/max system clock (xclk) frequencies */ +#define OV5640_XCLK_MIN 6000000 +#define OV5640_XCLK_MAX 54000000 + +#define OV5640_SKIP_FRAMES 4 + +#define OV5640_CHIP_ID 0x5640 +#define OV5640_DEFAULT_SLAVE_ID 0x3c + +#define OV5640_REG_SYS_RESET02 0x3002 +#define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006 +#define OV5640_REG_SYS_CTRL0 0x3008 +#define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42 +#define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02 +#define OV5640_REG_CHIP_ID 0x300a +#define OV5640_REG_IO_MIPI_CTRL00 0x300e +#define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017 +#define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018 +#define OV5640_REG_PAD_OUTPUT00 0x3019 +#define OV5640_REG_SYSTEM_CONTROL1 0x302e +#define OV5640_REG_SC_PLL_CTRL0 0x3034 +#define OV5640_REG_SC_PLL_CTRL1 0x3035 +#define OV5640_REG_SC_PLL_CTRL2 0x3036 +#define OV5640_REG_SC_PLL_CTRL3 0x3037 +#define OV5640_REG_SLAVE_ID 0x3100 +#define OV5640_REG_SCCB_SYS_CTRL1 0x3103 +#define OV5640_REG_SYS_ROOT_DIVIDER 0x3108 +#define OV5640_REG_AWB_R_GAIN 0x3400 +#define OV5640_REG_AWB_G_GAIN 0x3402 +#define OV5640_REG_AWB_B_GAIN 0x3404 +#define OV5640_REG_AWB_MANUAL_CTRL 0x3406 +#define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500 +#define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501 +#define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502 +#define OV5640_REG_AEC_PK_MANUAL 0x3503 +#define OV5640_REG_AEC_PK_REAL_GAIN 0x350a +#define OV5640_REG_AEC_PK_VTS 0x350c +#define OV5640_REG_TIMING_DVPHO 0x3808 +#define OV5640_REG_TIMING_DVPVO 0x380a +#define OV5640_REG_TIMING_HTS 0x380c +#define OV5640_REG_TIMING_VTS 0x380e +#define OV5640_REG_TIMING_TC_REG20 0x3820 +#define OV5640_REG_TIMING_TC_REG21 0x3821 +#define OV5640_REG_AEC_CTRL00 0x3a00 +#define OV5640_REG_AEC_B50_STEP 0x3a08 +#define OV5640_REG_AEC_B60_STEP 0x3a0a +#define OV5640_REG_AEC_CTRL0D 0x3a0d +#define OV5640_REG_AEC_CTRL0E 0x3a0e +#define OV5640_REG_AEC_CTRL0F 0x3a0f +#define OV5640_REG_AEC_CTRL10 0x3a10 +#define OV5640_REG_AEC_CTRL11 0x3a11 +#define OV5640_REG_AEC_CTRL1B 0x3a1b +#define OV5640_REG_AEC_CTRL1E 0x3a1e +#define OV5640_REG_AEC_CTRL1F 0x3a1f +#define OV5640_REG_HZ5060_CTRL00 0x3c00 +#define OV5640_REG_HZ5060_CTRL01 0x3c01 +#define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c +#define OV5640_REG_FRAME_CTRL01 0x4202 +#define OV5640_REG_FORMAT_CONTROL00 0x4300 +#define OV5640_REG_VFIFO_HSIZE 0x4602 +#define OV5640_REG_VFIFO_VSIZE 0x4604 +#define OV5640_REG_JPG_MODE_SELECT 0x4713 +#define OV5640_REG_CCIR656_CTRL00 0x4730 +#define OV5640_REG_POLARITY_CTRL00 0x4740 +#define OV5640_REG_MIPI_CTRL00 0x4800 +#define OV5640_REG_DEBUG_MODE 0x4814 +#define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f +#define OV5640_REG_PRE_ISP_TEST_SET1 0x503d +#define OV5640_REG_SDE_CTRL0 0x5580 +#define OV5640_REG_SDE_CTRL1 0x5581 +#define OV5640_REG_SDE_CTRL3 0x5583 +#define OV5640_REG_SDE_CTRL4 0x5584 +#define OV5640_REG_SDE_CTRL5 0x5585 +#define OV5640_REG_AVG_READOUT 0x56a1 + +enum ov5640_mode_id { + OV5640_MODE_QCIF_176_144 = 0, + OV5640_MODE_QVGA_320_240, + OV5640_MODE_VGA_640_480, + OV5640_MODE_NTSC_720_480, + OV5640_MODE_PAL_720_576, + OV5640_MODE_XGA_1024_768, + OV5640_MODE_720P_1280_720, + OV5640_MODE_1080P_1920_1080, + OV5640_MODE_QSXGA_2592_1944, + OV5640_NUM_MODES, +}; + +enum ov5640_frame_rate { + OV5640_15_FPS = 0, + OV5640_30_FPS, + OV5640_60_FPS, + OV5640_NUM_FRAMERATES, +}; + +enum ov5640_format_mux { + OV5640_FMT_MUX_YUV422 = 0, + OV5640_FMT_MUX_RGB, + OV5640_FMT_MUX_DITHER, + OV5640_FMT_MUX_RAW_DPC, + OV5640_FMT_MUX_SNR_RAW, + OV5640_FMT_MUX_RAW_CIP, +}; + +struct ov5640_pixfmt { + u32 code; + u32 colorspace; +}; + +static const struct ov5640_pixfmt ov5640_formats[] = { + { MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, }, + { MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, }, +}; + +/* + * FIXME: remove this when a subdev API becomes available + * to set the MIPI CSI-2 virtual channel. + */ +static unsigned int virtual_channel; +module_param(virtual_channel, uint, 0444); +MODULE_PARM_DESC(virtual_channel, + "MIPI CSI-2 virtual channel (0..3), default 0"); + +static const int ov5640_framerates[] = { + [OV5640_15_FPS] = 15, + [OV5640_30_FPS] = 30, + [OV5640_60_FPS] = 60, +}; + +/* regulator supplies */ +static const char * const ov5640_supply_name[] = { + "DOVDD", /* Digital I/O (1.8V) supply */ + "AVDD", /* Analog (2.8V) supply */ + "DVDD", /* Digital Core (1.5V) supply */ +}; + +#define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name) + +/* + * Image size under 1280 * 960 are SUBSAMPLING + * Image size upper 1280 * 960 are SCALING + */ +enum ov5640_downsize_mode { + SUBSAMPLING, + SCALING, +}; + +struct reg_value { + u16 reg_addr; + u8 val; + u8 mask; + u32 delay_ms; +}; + +struct ov5640_mode_info { + enum ov5640_mode_id id; + enum ov5640_downsize_mode dn_mode; + u32 hact; + u32 htot; + u32 vact; + u32 vtot; + const struct reg_value *reg_data; + u32 reg_data_size; + u32 max_fps; +}; + +struct ov5640_ctrls { + struct v4l2_ctrl_handler handler; + struct v4l2_ctrl *pixel_rate; + struct { + struct v4l2_ctrl *auto_exp; + struct v4l2_ctrl *exposure; + }; + struct { + struct v4l2_ctrl *auto_wb; + struct v4l2_ctrl *blue_balance; + struct v4l2_ctrl *red_balance; + }; + struct { + struct v4l2_ctrl *auto_gain; + struct v4l2_ctrl *gain; + }; + struct v4l2_ctrl *brightness; + struct v4l2_ctrl *light_freq; + struct v4l2_ctrl *saturation; + struct v4l2_ctrl *contrast; + struct v4l2_ctrl *hue; + struct v4l2_ctrl *test_pattern; + struct v4l2_ctrl *hflip; + struct v4l2_ctrl *vflip; +}; + +struct ov5640_dev { + struct i2c_client *i2c_client; + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ + struct clk *xclk; /* system clock to OV5640 */ + u32 xclk_freq; + + struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES]; + struct gpio_desc *reset_gpio; + struct gpio_desc *pwdn_gpio; + bool upside_down; + + /* lock to protect all members below */ + struct mutex lock; + + int power_count; + + struct v4l2_mbus_framefmt fmt; + bool pending_fmt_change; + + const struct ov5640_mode_info *current_mode; + const struct ov5640_mode_info *last_mode; + enum ov5640_frame_rate current_fr; + struct v4l2_fract frame_interval; + + struct ov5640_ctrls ctrls; + + u32 prev_sysclk, prev_hts; + u32 ae_low, ae_high, ae_target; + + bool pending_mode_change; + bool streaming; +}; + +static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd) +{ + return container_of(sd, struct ov5640_dev, sd); +} + +static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) +{ + return &container_of(ctrl->handler, struct ov5640_dev, + ctrls.handler)->sd; +} + +/* + * FIXME: all of these register tables are likely filled with + * entries that set the register to their power-on default values, + * and which are otherwise not touched by this driver. Those entries + * should be identified and removed to speed register load time + * over i2c. + */ +/* YUV422 UYVY VGA@30fps */ +static const struct reg_value ov5640_init_setting_30fps_VGA[] = { + {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0}, + {0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0}, + {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0}, + {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0}, + {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0}, + {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0}, + {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0}, + {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0}, + {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0}, + {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0}, + {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0}, + {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0}, + {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0}, + {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0}, + {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0}, + {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0}, + {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0}, + {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0}, + {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0}, + {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0}, + {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0}, + {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0}, + {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0}, + {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0}, + {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0}, + {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0}, + {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0}, + {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0}, + {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0}, + {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0}, + {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0}, + {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0}, + {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0}, + {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0}, + {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0}, + {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0}, + {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0}, + {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0}, + {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0}, + {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0}, + {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0}, + {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0}, + {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0}, + {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0}, + {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0}, + {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0}, + {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0}, + {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0}, + {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0}, + {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0}, + {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0}, + {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0}, + {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0}, + {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0}, + {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0}, + {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0}, + {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0}, + {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0}, + {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0}, + {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0}, + {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0}, + {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0}, + {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0}, + {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0}, + {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0}, + {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0}, + {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300}, +}; + +static const struct reg_value ov5640_setting_VGA_640_480[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, +}; + +static const struct reg_value ov5640_setting_XGA_1024_768[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, +}; + +static const struct reg_value ov5640_setting_QVGA_320_240[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, +}; + +static const struct reg_value ov5640_setting_QCIF_176_144[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, +}; + +static const struct reg_value ov5640_setting_NTSC_720_480[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, +}; + +static const struct reg_value ov5640_setting_PAL_720_576[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0}, +}; + +static const struct reg_value ov5640_setting_720P_1280_720[] = { + {0x3c07, 0x07, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x31, 0, 0}, + {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, + {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0}, + {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0}, + {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0}, + {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, + {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0}, +}; + +static const struct reg_value ov5640_setting_1080P_1920_1080[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x11, 0, 0}, + {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, + {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0}, + {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0}, + {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0}, + {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0}, + {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0}, + {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0}, + {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0}, + {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0}, + {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0}, + {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0}, + {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0}, + {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0}, + {0x4005, 0x1a, 0, 0}, +}; + +static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = { + {0x3c07, 0x08, 0, 0}, + {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, + {0x3814, 0x11, 0, 0}, + {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0}, + {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0}, + {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0}, + {0x3810, 0x00, 0, 0}, + {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0}, + {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0}, + {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0}, + {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0}, + {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0}, + {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0}, + {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, + {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, + {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 70}, +}; + +/* power-on sensor init reg table */ +static const struct ov5640_mode_info ov5640_mode_init_data = { + 0, SUBSAMPLING, 640, 1896, 480, 984, + ov5640_init_setting_30fps_VGA, + ARRAY_SIZE(ov5640_init_setting_30fps_VGA), + OV5640_30_FPS, +}; + +static const struct ov5640_mode_info +ov5640_mode_data[OV5640_NUM_MODES] = { + {OV5640_MODE_QCIF_176_144, SUBSAMPLING, + 176, 1896, 144, 984, + ov5640_setting_QCIF_176_144, + ARRAY_SIZE(ov5640_setting_QCIF_176_144), + OV5640_30_FPS}, + {OV5640_MODE_QVGA_320_240, SUBSAMPLING, + 320, 1896, 240, 984, + ov5640_setting_QVGA_320_240, + ARRAY_SIZE(ov5640_setting_QVGA_320_240), + OV5640_30_FPS}, + {OV5640_MODE_VGA_640_480, SUBSAMPLING, + 640, 1896, 480, 1080, + ov5640_setting_VGA_640_480, + ARRAY_SIZE(ov5640_setting_VGA_640_480), + OV5640_60_FPS}, + {OV5640_MODE_NTSC_720_480, SUBSAMPLING, + 720, 1896, 480, 984, + ov5640_setting_NTSC_720_480, + ARRAY_SIZE(ov5640_setting_NTSC_720_480), + OV5640_30_FPS}, + {OV5640_MODE_PAL_720_576, SUBSAMPLING, + 720, 1896, 576, 984, + ov5640_setting_PAL_720_576, + ARRAY_SIZE(ov5640_setting_PAL_720_576), + OV5640_30_FPS}, + {OV5640_MODE_XGA_1024_768, SUBSAMPLING, + 1024, 1896, 768, 1080, + ov5640_setting_XGA_1024_768, + ARRAY_SIZE(ov5640_setting_XGA_1024_768), + OV5640_30_FPS}, + {OV5640_MODE_720P_1280_720, SUBSAMPLING, + 1280, 1892, 720, 740, + ov5640_setting_720P_1280_720, + ARRAY_SIZE(ov5640_setting_720P_1280_720), + OV5640_30_FPS}, + {OV5640_MODE_1080P_1920_1080, SCALING, + 1920, 2500, 1080, 1120, + ov5640_setting_1080P_1920_1080, + ARRAY_SIZE(ov5640_setting_1080P_1920_1080), + OV5640_30_FPS}, + {OV5640_MODE_QSXGA_2592_1944, SCALING, + 2592, 2844, 1944, 1968, + ov5640_setting_QSXGA_2592_1944, + ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944), + OV5640_15_FPS}, +}; + +static int ov5640_init_slave_id(struct ov5640_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + struct i2c_msg msg; + u8 buf[3]; + int ret; + + if (client->addr == OV5640_DEFAULT_SLAVE_ID) + return 0; + + buf[0] = OV5640_REG_SLAVE_ID >> 8; + buf[1] = OV5640_REG_SLAVE_ID & 0xff; + buf[2] = client->addr << 1; + + msg.addr = OV5640_DEFAULT_SLAVE_ID; + msg.flags = 0; + msg.buf = buf; + msg.len = sizeof(buf); + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret < 0) { + dev_err(&client->dev, "%s: failed with %d\n", __func__, ret); + return ret; + } + + return 0; +} + +static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val) +{ + struct i2c_client *client = sensor->i2c_client; + struct i2c_msg msg; + u8 buf[3]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xff; + buf[2] = val; + + msg.addr = client->addr; + msg.flags = client->flags; + msg.buf = buf; + msg.len = sizeof(buf); + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret < 0) { + dev_err(&client->dev, "%s: error: reg=%x, val=%x\n", + __func__, reg, val); + return ret; + } + + return 0; +} + +static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val) +{ + struct i2c_client *client = sensor->i2c_client; + struct i2c_msg msg[2]; + u8 buf[2]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xff; + + msg[0].addr = client->addr; + msg[0].flags = client->flags; + msg[0].buf = buf; + msg[0].len = sizeof(buf); + + msg[1].addr = client->addr; + msg[1].flags = client->flags | I2C_M_RD; + msg[1].buf = buf; + msg[1].len = 1; + + ret = i2c_transfer(client->adapter, msg, 2); + if (ret < 0) { + dev_err(&client->dev, "%s: error: reg=%x\n", + __func__, reg); + return ret; + } + + *val = buf[0]; + return 0; +} + +static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val) +{ + u8 hi, lo; + int ret; + + ret = ov5640_read_reg(sensor, reg, &hi); + if (ret) + return ret; + ret = ov5640_read_reg(sensor, reg + 1, &lo); + if (ret) + return ret; + + *val = ((u16)hi << 8) | (u16)lo; + return 0; +} + +static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val) +{ + int ret; + + ret = ov5640_write_reg(sensor, reg, val >> 8); + if (ret) + return ret; + + return ov5640_write_reg(sensor, reg + 1, val & 0xff); +} + +static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg, + u8 mask, u8 val) +{ + u8 readval; + int ret; + + ret = ov5640_read_reg(sensor, reg, &readval); + if (ret) + return ret; + + readval &= ~mask; + val &= mask; + val |= readval; + + return ov5640_write_reg(sensor, reg, val); +} + +/* + * After trying the various combinations, reading various + * documentations spread around the net, and from the various + * feedback, the clock tree is probably as follows: + * + * +--------------+ + * | Ext. Clock | + * +-+------------+ + * | +----------+ + * +->| PLL1 | - reg 0x3036, for the multiplier + * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider + * | +--------------+ + * +->| System Clock | - reg 0x3035, bits 4-7 + * +-+------------+ + * | +--------------+ + * +->| MIPI Divider | - reg 0x3035, bits 0-3 + * | +-+------------+ + * | +----------------> MIPI SCLK + * | + +-----+ + * | +->| / 2 |-------> MIPI BIT CLK + * | +-----+ + * | +--------------+ + * +->| PLL Root Div | - reg 0x3037, bit 4 + * +-+------------+ + * | +---------+ + * +->| Bit Div | - reg 0x3034, bits 0-3 + * +-+-------+ + * | +-------------+ + * +->| SCLK Div | - reg 0x3108, bits 0-1 + * | +-+-----------+ + * | +---------------> SCLK + * | +-------------+ + * +->| SCLK 2X Div | - reg 0x3108, bits 2-3 + * | +-+-----------+ + * | +---------------> SCLK 2X + * | +-------------+ + * +->| PCLK Div | - reg 0x3108, bits 4-5 + * ++------------+ + * + +-----------+ + * +->| P_DIV | - reg 0x3035, bits 0-3 + * +-----+-----+ + * +------------> PCLK + * + * This is deviating from the datasheet at least for the register + * 0x3108, since it's said here that the PCLK would be clocked from + * the PLL. + * + * There seems to be also (unverified) constraints: + * - the PLL pre-divider output rate should be in the 4-27MHz range + * - the PLL multiplier output rate should be in the 500-1000MHz range + * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG + * + * In the two latter cases, these constraints are met since our + * factors are hardcoded. If we were to change that, we would need to + * take this into account. The only varying parts are the PLL + * multiplier and the system clock divider, which are shared between + * all these clocks so won't cause any issue. + */ + +/* + * This is supposed to be ranging from 1 to 8, but the value is always + * set to 3 in the vendor kernels. + */ +#define OV5640_PLL_PREDIV 3 + +#define OV5640_PLL_MULT_MIN 4 +#define OV5640_PLL_MULT_MAX 252 + +/* + * This is supposed to be ranging from 1 to 16, but the value is + * always set to either 1 or 2 in the vendor kernels. + */ +#define OV5640_SYSDIV_MIN 1 +#define OV5640_SYSDIV_MAX 16 + +/* + * Hardcode these values for scaler and non-scaler modes. + * FIXME: to be re-calcualted for 1 data lanes setups + */ +#define OV5640_MIPI_DIV_PCLK 2 +#define OV5640_MIPI_DIV_SCLK 1 + +/* + * This is supposed to be ranging from 1 to 2, but the value is always + * set to 2 in the vendor kernels. + */ +#define OV5640_PLL_ROOT_DIV 2 +#define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4) + +/* + * We only supports 8-bit formats at the moment + */ +#define OV5640_BIT_DIV 2 +#define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08 + +/* + * This is supposed to be ranging from 1 to 8, but the value is always + * set to 2 in the vendor kernels. + */ +#define OV5640_SCLK_ROOT_DIV 2 + +/* + * This is hardcoded so that the consistency is maintained between SCLK and + * SCLK 2x. + */ +#define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2) + +/* + * This is supposed to be ranging from 1 to 8, but the value is always + * set to 1 in the vendor kernels. + */ +#define OV5640_PCLK_ROOT_DIV 1 +#define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00 + +static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor, + u8 pll_prediv, u8 pll_mult, + u8 sysdiv) +{ + unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult; + + /* PLL1 output cannot exceed 1GHz. */ + if (sysclk / 1000000 > 1000) + return 0; + + return sysclk / sysdiv; +} + +static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor, + unsigned long rate, + u8 *pll_prediv, u8 *pll_mult, + u8 *sysdiv) +{ + unsigned long best = ~0; + u8 best_sysdiv = 1, best_mult = 1; + u8 _sysdiv, _pll_mult; + + for (_sysdiv = OV5640_SYSDIV_MIN; + _sysdiv <= OV5640_SYSDIV_MAX; + _sysdiv++) { + for (_pll_mult = OV5640_PLL_MULT_MIN; + _pll_mult <= OV5640_PLL_MULT_MAX; + _pll_mult++) { + unsigned long _rate; + + /* + * The PLL multiplier cannot be odd if above + * 127. + */ + if (_pll_mult > 127 && (_pll_mult % 2)) + continue; + + _rate = ov5640_compute_sys_clk(sensor, + OV5640_PLL_PREDIV, + _pll_mult, _sysdiv); + + /* + * We have reached the maximum allowed PLL1 output, + * increase sysdiv. + */ + if (!_rate) + break; + + /* + * Prefer rates above the expected clock rate than + * below, even if that means being less precise. + */ + if (_rate < rate) + continue; + + if (abs(rate - _rate) < abs(rate - best)) { + best = _rate; + best_sysdiv = _sysdiv; + best_mult = _pll_mult; + } + + if (_rate == rate) + goto out; + } + } + +out: + *sysdiv = best_sysdiv; + *pll_prediv = OV5640_PLL_PREDIV; + *pll_mult = best_mult; + + return best; +} + +/* + * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values + * for the MIPI CSI-2 output. + * + * @rate: The requested bandwidth per lane in bytes per second. + * 'Bandwidth Per Lane' is calculated as: + * bpl = HTOT * VTOT * FPS * bpp / num_lanes; + * + * This function use the requested bandwidth to calculate: + * - sample_rate = bpl / (bpp / num_lanes); + * = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes); + * + * - mipi_sclk = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR) + * + * with these fixed parameters: + * PLL_RDIV = 2; + * BIT_DIVIDER = 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5); + * PCLK_DIV = 1; + * + * The MIPI clock generation differs for modes that use the scaler and modes + * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI + * BIT CLk, and thus: + * + * - mipi_sclk = bpl / MIPI_DIV / 2; + * MIPI_DIV = 1; + * + * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated + * from the pixel clock, and thus: + * + * - sample_rate = bpl / (bpp / num_lanes); + * = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes); + * = bpl / (4 * MIPI_DIV / num_lanes); + * - MIPI_DIV = bpp / (4 * num_lanes); + * + * FIXME: this have been tested with 16bpp and 2 lanes setup only. + * MIPI_DIV is fixed to value 2, but it -might- be changed according to the + * above formula for setups with 1 lane or image formats with different bpp. + * + * FIXME: this deviates from the sensor manual documentation which is quite + * thin on the MIPI clock tree generation part. + */ +static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor, + unsigned long rate) +{ + const struct ov5640_mode_info *mode = sensor->current_mode; + u8 prediv, mult, sysdiv; + u8 mipi_div; + int ret; + + /* + * 1280x720 is reported to use 'SUBSAMPLING' only, + * but according to the sensor manual it goes through the + * scaler before subsampling. + */ + if (mode->dn_mode == SCALING || + (mode->id == OV5640_MODE_720P_1280_720)) + mipi_div = OV5640_MIPI_DIV_SCLK; + else + mipi_div = OV5640_MIPI_DIV_PCLK; + + ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv); + + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, + 0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT); + + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, + 0xff, sysdiv << 4 | mipi_div); + if (ret) + return ret; + + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult); + if (ret) + return ret; + + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, + 0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv); + if (ret) + return ret; + + return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, + 0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS); +} + +static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor, + unsigned long rate, + u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv, + u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div) +{ + unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV * + OV5640_PCLK_ROOT_DIV; + + _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult, + sysdiv); + *pll_rdiv = OV5640_PLL_ROOT_DIV; + *bit_div = OV5640_BIT_DIV; + *pclk_div = OV5640_PCLK_ROOT_DIV; + + return _rate / *pll_rdiv / *bit_div / *pclk_div; +} + +static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate) +{ + u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div; + int ret; + + ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv, + &bit_div, &pclk_div); + +#ifndef CONFIG_VIN_SENSOR_OV5640 + if (bit_div == 2) + bit_div = 8; +#else + bit_div = 0xa; +#endif + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, + 0x0f, bit_div); + if (ret) + return ret; + + /* + * We need to set sysdiv according to the clock, and to clear + * the MIPI divider. + */ + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, + 0xff, sysdiv << 4); + if (ret) + return ret; + + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, + 0xff, mult); + if (ret) + return ret; + + ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, + 0x1f, prediv | ((pll_rdiv - 1) << 4)); + if (ret) + return ret; + + return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30, + (ilog2(pclk_div) << 4)); +} + +/* set JPEG framing sizes */ +static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor, + const struct ov5640_mode_info *mode) +{ + int ret; + + /* + * compression mode 3 timing + * + * Data is transmitted with programmable width (VFIFO_HSIZE). + * No padding done. Last line may have less data. Varying + * number of lines per frame, depending on amount of data. + */ + ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3); + if (ret < 0) + return ret; + + ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact); + if (ret < 0) + return ret; + + return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact); +} + +/* download ov5640 settings to sensor through i2c */ +static int ov5640_set_timings(struct ov5640_dev *sensor, + const struct ov5640_mode_info *mode) +{ + int ret; + + if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) { + ret = ov5640_set_jpeg_timings(sensor, mode); + if (ret < 0) + return ret; + } + + ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact); + if (ret < 0) + return ret; + + ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact); + if (ret < 0) + return ret; + + ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot); + if (ret < 0) + return ret; + + return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot); +} + +static int ov5640_load_regs(struct ov5640_dev *sensor, + const struct ov5640_mode_info *mode) +{ + const struct reg_value *regs = mode->reg_data; + unsigned int i; + u32 delay_ms; + u16 reg_addr; + u8 mask, val; + int ret = 0; + + st_info(ST_SENSOR, "%s, mode = 0x%x\n", __func__, mode->id); + for (i = 0; i < mode->reg_data_size; ++i, ++regs) { + delay_ms = regs->delay_ms; + reg_addr = regs->reg_addr; + val = regs->val; + mask = regs->mask; + + /* remain in power down mode for DVP */ + if (regs->reg_addr == OV5640_REG_SYS_CTRL0 && + val == OV5640_REG_SYS_CTRL0_SW_PWUP && + sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY) + continue; + + if (mask) + ret = ov5640_mod_reg(sensor, reg_addr, mask, val); + else + ret = ov5640_write_reg(sensor, reg_addr, val); + if (ret) + break; + + if (delay_ms) + usleep_range(1000 * delay_ms, 1000 * delay_ms + 100); + } + + return ov5640_set_timings(sensor, mode); +} + +static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on) +{ + return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL, + BIT(0), on ? 0 : BIT(0)); +} + +/* read exposure, in number of line periods */ +static int ov5640_get_exposure(struct ov5640_dev *sensor) +{ + int exp, ret; + u8 temp; + + ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp); + if (ret) + return ret; + exp = ((int)temp & 0x0f) << 16; + ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp); + if (ret) + return ret; + exp |= ((int)temp << 8); + ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp); + if (ret) + return ret; + exp |= (int)temp; + + return exp >> 4; +} + +/* write exposure, given number of line periods */ +static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure) +{ + int ret; + + exposure <<= 4; + + ret = ov5640_write_reg(sensor, + OV5640_REG_AEC_PK_EXPOSURE_LO, + exposure & 0xff); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, + OV5640_REG_AEC_PK_EXPOSURE_MED, + (exposure >> 8) & 0xff); + if (ret) + return ret; + return ov5640_write_reg(sensor, + OV5640_REG_AEC_PK_EXPOSURE_HI, + (exposure >> 16) & 0x0f); +} + +static int ov5640_get_gain(struct ov5640_dev *sensor) +{ + u16 gain; + int ret; + + ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain); + if (ret) + return ret; + + return gain & 0x3ff; +} + +static int ov5640_set_gain(struct ov5640_dev *sensor, int gain) +{ + return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, + (u16)gain & 0x3ff); +} + +static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on) +{ + return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL, + BIT(1), on ? 0 : BIT(1)); +} + +static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on) +{ + return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ? + OV5640_REG_SYS_CTRL0_SW_PWUP : + OV5640_REG_SYS_CTRL0_SW_PWDN); +} + +static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on) +{ + int ret; + + /* + * Enable/disable the MIPI interface + * + * 0x300e = on ? 0x45 : 0x40 + * + * FIXME: the sensor manual (version 2.03) reports + * [7:5] = 000 : 1 data lane mode + * [7:5] = 001 : 2 data lanes mode + * But this settings do not work, while the following ones + * have been validated for 2 data lanes mode. + * + * [7:5] = 010 : 2 data lanes mode + * [4] = 0 : Power up MIPI HS Tx + * [3] = 0 : Power up MIPI LS Rx + * [2] = 1/0 : MIPI interface enable/disable + * [1:0] = 01/00: FIXME: 'debug' + */ + ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, + on ? 0x45 : 0x40); + if (ret) + return ret; + + return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01, + on ? 0x00 : 0x0f); +} + +static int ov5640_get_sysclk(struct ov5640_dev *sensor) +{ + /* calculate sysclk */ + u32 xvclk = sensor->xclk_freq / 10000; + u32 multiplier, prediv, VCO, sysdiv, pll_rdiv; + u32 sclk_rdiv_map[] = {1, 2, 4, 8}; + u32 bit_div2x = 1, sclk_rdiv, sysclk; + u8 temp1, temp2; + int ret; + + ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1); + if (ret) + return ret; + temp2 = temp1 & 0x0f; + if (temp2 == 8 || temp2 == 10) + bit_div2x = temp2 / 2; + + ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1); + if (ret) + return ret; + sysdiv = temp1 >> 4; + if (sysdiv == 0) + sysdiv = 16; + + ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1); + if (ret) + return ret; + multiplier = temp1; + + ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1); + if (ret) + return ret; + prediv = temp1 & 0x0f; + pll_rdiv = ((temp1 >> 4) & 0x01) + 1; + + ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1); + if (ret) + return ret; + temp2 = temp1 & 0x03; + sclk_rdiv = sclk_rdiv_map[temp2]; + + if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x) + return -EINVAL; + + VCO = xvclk * multiplier / prediv; + + sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv; + + return sysclk; +} + +static int ov5640_set_night_mode(struct ov5640_dev *sensor) +{ + /* read HTS from register settings */ + u8 mode; + int ret; + + ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode); + if (ret) + return ret; + mode &= 0xfb; + return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode); +} + +static int ov5640_get_hts(struct ov5640_dev *sensor) +{ + /* read HTS from register settings */ + u16 hts; + int ret; + + ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts); + if (ret) + return ret; + return hts; +} + +static int ov5640_get_vts(struct ov5640_dev *sensor) +{ + u16 vts; + int ret; + + ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts); + if (ret) + return ret; + return vts; +} + +static int ov5640_set_vts(struct ov5640_dev *sensor, int vts) +{ + return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts); +} + +static int ov5640_get_light_freq(struct ov5640_dev *sensor) +{ + /* get banding filter value */ + int ret, light_freq = 0; + u8 temp, temp1; + + ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp); + if (ret) + return ret; + + if (temp & 0x80) { + /* manual */ + ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00, + &temp1); + if (ret) + return ret; + if (temp1 & 0x04) { + /* 50Hz */ + light_freq = 50; + } else { + /* 60Hz */ + light_freq = 60; + } + } else { + /* auto */ + ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C, + &temp1); + if (ret) + return ret; + + if (temp1 & 0x01) { + /* 50Hz */ + light_freq = 50; + } else { + /* 60Hz */ + } + } + + return light_freq; +} + +static int ov5640_set_bandingfilter(struct ov5640_dev *sensor) +{ + u32 band_step60, max_band60, band_step50, max_band50, prev_vts; + int ret; + + /* read preview PCLK */ + ret = ov5640_get_sysclk(sensor); + if (ret < 0) + return ret; + if (ret == 0) + return -EINVAL; + sensor->prev_sysclk = ret; + /* read preview HTS */ + ret = ov5640_get_hts(sensor); + if (ret < 0) + return ret; + if (ret == 0) + return -EINVAL; + sensor->prev_hts = ret; + + /* read preview VTS */ + ret = ov5640_get_vts(sensor); + if (ret < 0) + return ret; + prev_vts = ret; + + /* calculate banding filter */ + /* 60Hz */ + band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120; + ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60); + if (ret) + return ret; + if (!band_step60) + return -EINVAL; + max_band60 = (int)((prev_vts - 4) / band_step60); + ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60); + if (ret) + return ret; + + /* 50Hz */ + band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts; + ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50); + if (ret) + return ret; + if (!band_step50) + return -EINVAL; + max_band50 = (int)((prev_vts - 4) / band_step50); + return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50); +} + +static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target) +{ + /* stable in high */ + u32 fast_high, fast_low; + int ret; + + sensor->ae_low = target * 23 / 25; /* 0.92 */ + sensor->ae_high = target * 27 / 25; /* 1.08 */ + + fast_high = sensor->ae_high << 1; + if (fast_high > 255) + fast_high = 255; + + fast_low = sensor->ae_low >> 1; + + ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high); + if (ret) + return ret; + return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low); +} + +static int ov5640_get_binning(struct ov5640_dev *sensor) +{ + u8 temp; + int ret; + + ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp); + if (ret) + return ret; + + return temp & BIT(0); +} + +static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable) +{ + int ret; + + /* + * TIMING TC REG21: + * - [0]: Horizontal binning enable + */ + ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, + BIT(0), enable ? BIT(0) : 0); + if (ret) + return ret; + /* + * TIMING TC REG20: + * - [0]: Undocumented, but hardcoded init sequences + * are always setting REG21/REG20 bit 0 to same value... + */ + return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20, + BIT(0), enable ? BIT(0) : 0); +} + +static int ov5640_set_virtual_channel(struct ov5640_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + u8 temp, channel = virtual_channel; + int ret; + + if (channel > 3) { + dev_err(&client->dev, + "%s: wrong virtual_channel parameter, expected (0..3), got %d\n", + __func__, channel); + return -EINVAL; + } + + ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp); + if (ret) + return ret; + temp &= ~(3 << 6); + temp |= (channel << 6); + return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp); +} + +static const struct ov5640_mode_info * +ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr, + int width, int height, bool nearest) +{ + const struct ov5640_mode_info *mode; + + mode = v4l2_find_nearest_size(ov5640_mode_data, + ARRAY_SIZE(ov5640_mode_data), + hact, vact, + width, height); + + if (!mode || + (!nearest && (mode->hact != width || mode->vact != height))) + return NULL; + + /* Check to see if the current mode exceeds the max frame rate */ + if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps]) + return NULL; + + return mode; +} + +static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor) +{ + u64 rate; + + rate = sensor->current_mode->vtot * sensor->current_mode->htot; + rate *= ov5640_framerates[sensor->current_fr]; + + return rate; +} + +/* + * sensor changes between scaling and subsampling, go through + * exposure calculation + */ +static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor, + const struct ov5640_mode_info *mode) +{ + u32 prev_shutter, prev_gain16; + u32 cap_shutter, cap_gain16; + u32 cap_sysclk, cap_hts, cap_vts; + u32 light_freq, cap_bandfilt, cap_maxband; + u32 cap_gain16_shutter; + u8 average; + int ret; + + if (!mode->reg_data) + return -EINVAL; + + /* read preview shutter */ + ret = ov5640_get_exposure(sensor); + if (ret < 0) + return ret; + prev_shutter = ret; + ret = ov5640_get_binning(sensor); + if (ret < 0) + return ret; + if (ret && mode->id != OV5640_MODE_720P_1280_720 && + mode->id != OV5640_MODE_1080P_1920_1080) + prev_shutter *= 2; + + /* read preview gain */ + ret = ov5640_get_gain(sensor); + if (ret < 0) + return ret; + prev_gain16 = ret; + + /* get average */ + ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average); + if (ret) + return ret; + + /* turn off night mode for capture */ + ret = ov5640_set_night_mode(sensor); + if (ret < 0) + return ret; + + /* Write capture setting */ + ret = ov5640_load_regs(sensor, mode); + if (ret < 0) + return ret; + + /* read capture VTS */ + ret = ov5640_get_vts(sensor); + if (ret < 0) + return ret; + cap_vts = ret; + ret = ov5640_get_hts(sensor); + if (ret < 0) + return ret; + if (ret == 0) + return -EINVAL; + cap_hts = ret; + + ret = ov5640_get_sysclk(sensor); + if (ret < 0) + return ret; + if (ret == 0) + return -EINVAL; + cap_sysclk = ret; + + /* calculate capture banding filter */ + ret = ov5640_get_light_freq(sensor); + if (ret < 0) + return ret; + light_freq = ret; + + if (light_freq == 60) { + /* 60Hz */ + cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120; + } else { + /* 50Hz */ + cap_bandfilt = cap_sysclk * 100 / cap_hts; + } + + if (!sensor->prev_sysclk) { + ret = ov5640_get_sysclk(sensor); + if (ret < 0) + return ret; + if (ret == 0) + return -EINVAL; + sensor->prev_sysclk = ret; + } + + if (!cap_bandfilt) + return -EINVAL; + + cap_maxband = (int)((cap_vts - 4) / cap_bandfilt); + + /* calculate capture shutter/gain16 */ + if (average > sensor->ae_low && average < sensor->ae_high) { + /* in stable range */ + cap_gain16_shutter = + prev_gain16 * prev_shutter * + cap_sysclk / sensor->prev_sysclk * + sensor->prev_hts / cap_hts * + sensor->ae_target / average; + } else { + cap_gain16_shutter = + prev_gain16 * prev_shutter * + cap_sysclk / sensor->prev_sysclk * + sensor->prev_hts / cap_hts; + } + + /* gain to shutter */ + if (cap_gain16_shutter < (cap_bandfilt * 16)) { + /* shutter < 1/100 */ + cap_shutter = cap_gain16_shutter / 16; + if (cap_shutter < 1) + cap_shutter = 1; + + cap_gain16 = cap_gain16_shutter / cap_shutter; + if (cap_gain16 < 16) + cap_gain16 = 16; + } else { + if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) { + /* exposure reach max */ + cap_shutter = cap_bandfilt * cap_maxband; + if (!cap_shutter) + return -EINVAL; + + cap_gain16 = cap_gain16_shutter / cap_shutter; + } else { + /* 1/100 < (cap_shutter = n/100) =< max */ + cap_shutter = + ((int)(cap_gain16_shutter / 16 / cap_bandfilt)) + * cap_bandfilt; + if (!cap_shutter) + return -EINVAL; + + cap_gain16 = cap_gain16_shutter / cap_shutter; + } + } + + /* set capture gain */ + ret = ov5640_set_gain(sensor, cap_gain16); + if (ret) + return ret; + + /* write capture shutter */ + if (cap_shutter > (cap_vts - 4)) { + cap_vts = cap_shutter + 4; + ret = ov5640_set_vts(sensor, cap_vts); + if (ret < 0) + return ret; + } + + /* set exposure */ + return ov5640_set_exposure(sensor, cap_shutter); +} + +/* + * if sensor changes inside scaling or subsampling + * change mode directly + */ +static int ov5640_set_mode_direct(struct ov5640_dev *sensor, + const struct ov5640_mode_info *mode) +{ + if (!mode->reg_data) + return -EINVAL; + + /* Write capture setting */ + return ov5640_load_regs(sensor, mode); +} + +static int ov5640_set_mode(struct ov5640_dev *sensor) +{ + const struct ov5640_mode_info *mode = sensor->current_mode; + const struct ov5640_mode_info *orig_mode = sensor->last_mode; + enum ov5640_downsize_mode dn_mode, orig_dn_mode; + bool auto_gain = sensor->ctrls.auto_gain->val == 1; + bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO; + unsigned long rate; + int ret; + + dn_mode = mode->dn_mode; + orig_dn_mode = orig_mode->dn_mode; + + /* auto gain and exposure must be turned off when changing modes */ + if (auto_gain) { + ret = ov5640_set_autogain(sensor, false); + if (ret) + return ret; + } + + if (auto_exp) { + ret = ov5640_set_autoexposure(sensor, false); + if (ret) + goto restore_auto_gain; + } + + /* + * All the formats we support have 16 bits per pixel, seems to require + * the same rate than YUV, so we can just use 16 bpp all the time. + */ + rate = ov5640_calc_pixel_rate(sensor) * 16; + if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) { + rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes; + ret = ov5640_set_mipi_pclk(sensor, rate); + } else { + rate = rate / sensor->ep.bus.parallel.bus_width; + ret = ov5640_set_dvp_pclk(sensor, rate); + } + + if (ret < 0) + return 0; + + if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) || + (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) { + /* + * change between subsampling and scaling + * go through exposure calculation + */ + ret = ov5640_set_mode_exposure_calc(sensor, mode); + } else { + /* + * change inside subsampling or scaling + * download firmware directly + */ + ret = ov5640_set_mode_direct(sensor, mode); + } + if (ret < 0) + goto restore_auto_exp_gain; + + /* restore auto gain and exposure */ + if (auto_gain) + ov5640_set_autogain(sensor, true); + if (auto_exp) + ov5640_set_autoexposure(sensor, true); + + ret = ov5640_set_binning(sensor, dn_mode != SCALING); + if (ret < 0) + return ret; + ret = ov5640_set_ae_target(sensor, sensor->ae_target); + if (ret < 0) + return ret; + ret = ov5640_get_light_freq(sensor); + if (ret < 0) + return ret; + ret = ov5640_set_bandingfilter(sensor); + if (ret < 0) + return ret; + ret = ov5640_set_virtual_channel(sensor); + if (ret < 0) + return ret; + + sensor->pending_mode_change = false; + sensor->last_mode = mode; + + return 0; + +restore_auto_exp_gain: + if (auto_exp) + ov5640_set_autoexposure(sensor, true); +restore_auto_gain: + if (auto_gain) + ov5640_set_autogain(sensor, true); + + return ret; +} + +static int ov5640_set_framefmt(struct ov5640_dev *sensor, + struct v4l2_mbus_framefmt *format); + +/* restore the last set video mode after chip power-on */ +static int ov5640_restore_mode(struct ov5640_dev *sensor) +{ + int ret; + + /* first load the initial register values */ + ret = ov5640_load_regs(sensor, &ov5640_mode_init_data); + if (ret < 0) + return ret; + sensor->last_mode = &ov5640_mode_init_data; + + ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f, + (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) | + ilog2(OV5640_SCLK_ROOT_DIV)); + if (ret) + return ret; + + /* now restore the last capture mode */ + ret = ov5640_set_mode(sensor); + if (ret < 0) + return ret; + + return ov5640_set_framefmt(sensor, &sensor->fmt); +} + +static void ov5640_power(struct ov5640_dev *sensor, bool enable) +{ + if (!sensor->pwdn_gpio) + return; + gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1); +} + +static void ov5640_reset(struct ov5640_dev *sensor) +{ + if (!sensor->reset_gpio) + return; + + gpiod_set_value_cansleep(sensor->reset_gpio, 0); + + /* camera power cycle */ + ov5640_power(sensor, false); + usleep_range(5000, 10000); + ov5640_power(sensor, true); + usleep_range(5000, 10000); + + gpiod_set_value_cansleep(sensor->reset_gpio, 1); + usleep_range(1000, 2000); + + gpiod_set_value_cansleep(sensor->reset_gpio, 0); + usleep_range(20000, 25000); +} + +static int ov5640_set_power_on(struct ov5640_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + int ret; + + ret = clk_prepare_enable(sensor->xclk); + if (ret) { + dev_err(&client->dev, "%s: failed to enable clock\n", + __func__); + return ret; + } + + ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES, + sensor->supplies); + if (ret) { + dev_err(&client->dev, "%s: failed to enable regulators\n", + __func__); + goto xclk_off; + } + + ov5640_reset(sensor); + ov5640_power(sensor, true); + + ret = ov5640_init_slave_id(sensor); + if (ret) + goto power_off; + + return 0; + +power_off: + ov5640_power(sensor, false); + regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies); +xclk_off: + clk_disable_unprepare(sensor->xclk); + return ret; +} + +static void ov5640_set_power_off(struct ov5640_dev *sensor) +{ + ov5640_power(sensor, false); + regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies); + clk_disable_unprepare(sensor->xclk); +} + +static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on) +{ + int ret; + + if (!on) { + /* Reset MIPI bus settings to their default values. */ + ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58); + ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04); + ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00); + return 0; + } + + /* + * Power up MIPI HS Tx and LS Rx; 2 data lanes mode + * + * 0x300e = 0x40 + * [7:5] = 010 : 2 data lanes mode (see FIXME note in + * "ov5640_set_stream_mipi()") + * [4] = 0 : Power up MIPI HS Tx + * [3] = 0 : Power up MIPI LS Rx + * [2] = 0 : MIPI interface disabled + */ + ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40); + if (ret) + return ret; + + /* + * Gate clock and set LP11 in 'no packets mode' (idle) + * + * 0x4800 = 0x24 + * [5] = 1 : Gate clock when 'no packets' + * [2] = 1 : MIPI bus in LP11 when 'no packets' + */ + ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24); + if (ret) + return ret; + + /* + * Set data lanes and clock in LP11 when 'sleeping' + * + * 0x3019 = 0x70 + * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping' + * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping' + * [4] = 1 : MIPI clock lane in LP11 when 'sleeping' + */ + ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70); + if (ret) + return ret; + + /* Give lanes some time to coax into LP11 state. */ + usleep_range(500, 1000); + + return 0; +} + +static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on) +{ + unsigned int flags = sensor->ep.bus.parallel.flags; + bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656; + u8 polarities = 0; + int ret; + + if (!on) { + /* Reset settings to their default values. */ + ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00); + ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58); + ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20); + ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00); + ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00); + return 0; + } + + /* + * Note about parallel port configuration. + * + * When configured in parallel mode, the OV5640 will + * output 10 bits data on DVP data lines [9:0]. + * If only 8 bits data are wanted, the 8 bits data lines + * of the camera interface must be physically connected + * on the DVP data lines [9:2]. + * + * Control lines polarity can be configured through + * devicetree endpoint control lines properties. + * If no endpoint control lines properties are set, + * polarity will be as below: + * - VSYNC: active high + * - HREF: active low + * - PCLK: active low + * + * VSYNC & HREF are not configured if BT656 bus mode is selected + */ + + /* + * BT656 embedded synchronization configuration + * + * CCIR656 CTRL00 + * - [7]: SYNC code selection (0: auto generate sync code, + * 1: sync code from regs 0x4732-0x4735) + * - [6]: f value in CCIR656 SYNC code when fixed f value + * - [5]: Fixed f value + * - [4:3]: Blank toggle data options (00: data=1'h040/1'h200, + * 01: data from regs 0x4736-0x4738, 10: always keep 0) + * - [1]: Clip data disable + * - [0]: CCIR656 mode enable + * + * Default CCIR656 SAV/EAV mode with default codes + * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings: + * - CCIR656 mode enable + * - auto generation of sync codes + * - blank toggle data 1'h040/1'h200 + * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe) + */ + ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, + bt656 ? 0x01 : 0x00); + if (ret) + return ret; + + /* + * configure parallel port control lines polarity + * + * POLARITY CTRL0 + * - [5]: PCLK polarity (0: active low, 1: active high) + * - [1]: HREF polarity (0: active low, 1: active high) + * - [0]: VSYNC polarity (mismatch here between + * datasheet and hardware, 0 is active high + * and 1 is active low...) + */ + if (!bt656) { + if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) + polarities |= BIT(1); + if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) + polarities |= BIT(0); + } + if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING) + polarities |= BIT(5); + + ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities); + if (ret) + return ret; + + /* + * powerdown MIPI TX/RX PHY & enable DVP + * + * MIPI CONTROL 00 + * [4] = 1 : Power down MIPI HS Tx + * [3] = 1 : Power down MIPI LS Rx + * [2] = 0 : DVP enable (MIPI disable) + */ + ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58); + if (ret) + return ret; + + /* + * enable VSYNC/HREF/PCLK DVP control lines + * & D[9:6] DVP data lines + * + * PAD OUTPUT ENABLE 01 + * - 6: VSYNC output enable + * - 5: HREF output enable + * - 4: PCLK output enable + * - [3:0]: D[9:6] output enable + */ + ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, + bt656 ? 0x1f : 0x7f); + if (ret) + return ret; + + /* + * enable D[5:0] DVP data lines + * + * PAD OUTPUT ENABLE 02 + * - [7:2]: D[5:0] output enable + */ + return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc); +} + +static int ov5640_set_power(struct ov5640_dev *sensor, bool on) +{ + int ret = 0; + + if (on) { + ret = ov5640_set_power_on(sensor); + if (ret) + return ret; + + ret = ov5640_restore_mode(sensor); + if (ret) + goto power_off; + } + + if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) + ret = ov5640_set_power_mipi(sensor, on); + else + ret = ov5640_set_power_dvp(sensor, on); + if (ret) + goto power_off; + + if (!on) + ov5640_set_power_off(sensor); + + return 0; + +power_off: + ov5640_set_power_off(sensor); + return ret; +} + +/* --------------- Subdev Operations --------------- */ + +static int ov5640_s_power(struct v4l2_subdev *sd, int on) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + int ret = 0; + + mutex_lock(&sensor->lock); + + /* + * If the power count is modified from 0 to != 0 or from != 0 to 0, + * update the power state. + */ + if (sensor->power_count == !on) { + ret = ov5640_set_power(sensor, !!on); + if (ret) + goto out; + } + + /* Update the power count. */ + sensor->power_count += on ? 1 : -1; + WARN_ON(sensor->power_count < 0); +out: + mutex_unlock(&sensor->lock); + + if (on && !ret && sensor->power_count == 1) { + /* restore controls */ + ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler); + } + + return ret; +} + +static int ov5640_try_frame_interval(struct ov5640_dev *sensor, + struct v4l2_fract *fi, + u32 width, u32 height) +{ + const struct ov5640_mode_info *mode; + enum ov5640_frame_rate rate = OV5640_15_FPS; + int minfps, maxfps, best_fps, fps; + int i; + + minfps = ov5640_framerates[OV5640_15_FPS]; + maxfps = ov5640_framerates[OV5640_60_FPS]; + + if (fi->numerator == 0) { + fi->denominator = maxfps; + fi->numerator = 1; + rate = OV5640_60_FPS; + goto find_mode; + } + + fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator), + minfps, maxfps); + + best_fps = minfps; + for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) { + int curr_fps = ov5640_framerates[i]; + + if (abs(curr_fps - fps) < abs(best_fps - fps)) { + best_fps = curr_fps; + rate = i; + } + } + + fi->numerator = 1; + fi->denominator = best_fps; + +find_mode: + mode = ov5640_find_mode(sensor, rate, width, height, false); + return mode ? rate : -EINVAL; +} + +static int ov5640_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + struct v4l2_mbus_framefmt *fmt; + + if (format->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg, + format->pad); + else + fmt = &sensor->fmt; + + format->format = *fmt; + + mutex_unlock(&sensor->lock); + + return 0; +} + +static int ov5640_try_fmt_internal(struct v4l2_subdev *sd, + struct v4l2_mbus_framefmt *fmt, + enum ov5640_frame_rate fr, + const struct ov5640_mode_info **new_mode) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + const struct ov5640_mode_info *mode; + int i; + + mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true); + if (!mode) + return -EINVAL; + fmt->width = mode->hact; + fmt->height = mode->vact; + + if (new_mode) + *new_mode = mode; + + for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++) + if (ov5640_formats[i].code == fmt->code) + break; + if (i >= ARRAY_SIZE(ov5640_formats)) + i = 0; + + fmt->code = ov5640_formats[i].code; + fmt->colorspace = ov5640_formats[i].colorspace; + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); + fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); + + return 0; +} + +static int ov5640_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + const struct ov5640_mode_info *new_mode; + struct v4l2_mbus_framefmt *mbus_fmt = &format->format; + struct v4l2_mbus_framefmt *fmt; + int ret; + + if (format->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (sensor->streaming) { + ret = -EBUSY; + goto out; + } + + ret = ov5640_try_fmt_internal(sd, mbus_fmt, 0, &new_mode); + if (ret) + goto out; + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + fmt = v4l2_subdev_get_try_format(sd, cfg, 0); + else + fmt = &sensor->fmt; + + if (mbus_fmt->code != sensor->fmt.code) + sensor->pending_fmt_change = true; + + *fmt = *mbus_fmt; + + if (new_mode != sensor->current_mode) { + sensor->current_mode = new_mode; + sensor->pending_mode_change = true; + } + if (new_mode->max_fps < sensor->current_fr) { + sensor->current_fr = new_mode->max_fps; + sensor->frame_interval.numerator = 1; + sensor->frame_interval.denominator = + ov5640_framerates[sensor->current_fr]; + sensor->current_mode = new_mode; + sensor->pending_mode_change = true; + } + + __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, + ov5640_calc_pixel_rate(sensor)); +out: + mutex_unlock(&sensor->lock); + return ret; +} + +static int ov5640_set_framefmt(struct ov5640_dev *sensor, + struct v4l2_mbus_framefmt *format) +{ + int ret = 0; + bool is_jpeg = false; + u8 fmt, mux; + + switch (format->code) { + case MEDIA_BUS_FMT_UYVY8_2X8: + /* YUV422, UYVY */ + fmt = 0x3f; + mux = OV5640_FMT_MUX_YUV422; + break; + case MEDIA_BUS_FMT_YUYV8_2X8: + /* YUV422, YUYV */ + fmt = 0x30; + mux = OV5640_FMT_MUX_YUV422; + break; + case MEDIA_BUS_FMT_RGB565_2X8_LE: + /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */ + fmt = 0x6F; + mux = OV5640_FMT_MUX_RGB; + break; + case MEDIA_BUS_FMT_RGB565_2X8_BE: + /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */ + fmt = 0x61; + mux = OV5640_FMT_MUX_RGB; + break; + case MEDIA_BUS_FMT_JPEG_1X8: + /* YUV422, YUYV */ + fmt = 0x30; + mux = OV5640_FMT_MUX_YUV422; + is_jpeg = true; + break; + case MEDIA_BUS_FMT_SBGGR8_1X8: + /* Raw, BGBG... / GRGR... */ + fmt = 0x00; + mux = OV5640_FMT_MUX_RAW_DPC; + break; + case MEDIA_BUS_FMT_SGBRG8_1X8: + /* Raw bayer, GBGB... / RGRG... */ + fmt = 0x01; + mux = OV5640_FMT_MUX_RAW_DPC; + break; + case MEDIA_BUS_FMT_SGRBG8_1X8: + /* Raw bayer, GRGR... / BGBG... */ + fmt = 0x02; + mux = OV5640_FMT_MUX_RAW_DPC; + break; + case MEDIA_BUS_FMT_SRGGB8_1X8: + /* Raw bayer, RGRG... / GBGB... */ + fmt = 0x03; + mux = OV5640_FMT_MUX_RAW_DPC; + break; + default: + return -EINVAL; + } + + /* FORMAT CONTROL00: YUV and RGB formatting */ + ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt); + if (ret) + return ret; + + /* FORMAT MUX CONTROL: ISP YUV or RGB */ + ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux); + if (ret) + return ret; + + /* + * TIMING TC REG21: + * - [5]: JPEG enable + */ + ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, + BIT(5), is_jpeg ? BIT(5) : 0); + if (ret) + return ret; + + /* + * SYSTEM RESET02: + * - [4]: Reset JFIFO + * - [3]: Reset SFIFO + * - [2]: Reset JPEG + */ + ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02, + BIT(4) | BIT(3) | BIT(2), + is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2))); + if (ret) + return ret; + + /* + * CLOCK ENABLE02: + * - [5]: Enable JPEG 2x clock + * - [3]: Enable JPEG clock + */ + return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02, + BIT(5) | BIT(3), + is_jpeg ? (BIT(5) | BIT(3)) : 0); +} + +/* + * Sensor Controls. + */ + +static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value) +{ + int ret; + + if (value) { + ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, + BIT(0), BIT(0)); + if (ret) + return ret; + ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value); + } else { + ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0); + } + + return ret; +} + +static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value) +{ + int ret; + + if (value) { + ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, + BIT(2), BIT(2)); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5, + value & 0xff); + } else { + ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0); + } + + return ret; +} + +static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value) +{ + int ret; + + if (value) { + ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, + BIT(1), BIT(1)); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3, + value & 0xff); + if (ret) + return ret; + ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4, + value & 0xff); + } else { + ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0); + } + + return ret; +} + +static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb) +{ + int ret; + + ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL, + BIT(0), awb ? 0 : 1); + if (ret) + return ret; + + if (!awb) { + u16 red = (u16)sensor->ctrls.red_balance->val; + u16 blue = (u16)sensor->ctrls.blue_balance->val; + + ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red); + if (ret) + return ret; + ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue); + } + + return ret; +} + +static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor, + enum v4l2_exposure_auto_type auto_exposure) +{ + struct ov5640_ctrls *ctrls = &sensor->ctrls; + bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO); + int ret = 0; + + if (ctrls->auto_exp->is_new) { + ret = ov5640_set_autoexposure(sensor, auto_exp); + if (ret) + return ret; + } + + if (!auto_exp && ctrls->exposure->is_new) { + u16 max_exp; + + ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS, + &max_exp); + if (ret) + return ret; + ret = ov5640_get_vts(sensor); + if (ret < 0) + return ret; + max_exp += ret; + ret = 0; + + if (ctrls->exposure->val < max_exp) + ret = ov5640_set_exposure(sensor, ctrls->exposure->val); + } + + return ret; +} + +static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain) +{ + struct ov5640_ctrls *ctrls = &sensor->ctrls; + int ret = 0; + + if (ctrls->auto_gain->is_new) { + ret = ov5640_set_autogain(sensor, auto_gain); + if (ret) + return ret; + } + + if (!auto_gain && ctrls->gain->is_new) + ret = ov5640_set_gain(sensor, ctrls->gain->val); + + return ret; +} + +static const char * const test_pattern_menu[] = { + "Disabled", + "Color bars", + "Color bars w/ rolling bar", + "Color squares", + "Color squares w/ rolling bar", +}; + +#define OV5640_TEST_ENABLE BIT(7) +#define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */ +#define OV5640_TEST_TRANSPARENT BIT(5) +#define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */ +#define OV5640_TEST_BAR_STANDARD (0 << 2) +#define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2) +#define OV5640_TEST_BAR_HOR_CHANGE (2 << 2) +#define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2) +#define OV5640_TEST_BAR (0 << 0) +#define OV5640_TEST_RANDOM (1 << 0) +#define OV5640_TEST_SQUARE (2 << 0) +#define OV5640_TEST_BLACK (3 << 0) + +static const u8 test_pattern_val[] = { + 0, + OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 | + OV5640_TEST_BAR, + OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | + OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR, + OV5640_TEST_ENABLE | OV5640_TEST_SQUARE, + OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE, +}; + +static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value) +{ + return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1, + test_pattern_val[value]); +} + +static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value) +{ + int ret; + + ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7), + (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ? + 0 : BIT(7)); + if (ret) + return ret; + + return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2), + (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ? + BIT(2) : 0); +} + +static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value) +{ + /* + * If sensor is mounted upside down, mirror logic is inversed. + * + * Sensor is a BSI (Back Side Illuminated) one, + * so image captured is physically mirrored. + * This is why mirror logic is inversed in + * order to cancel this mirror effect. + */ + + /* + * TIMING TC REG21: + * - [2]: ISP mirror + * - [1]: Sensor mirror + */ + return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21, + BIT(2) | BIT(1), + (!(value ^ sensor->upside_down)) ? + (BIT(2) | BIT(1)) : 0); +} + +static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value) +{ + /* If sensor is mounted upside down, flip logic is inversed */ + + /* + * TIMING TC REG20: + * - [2]: ISP vflip + * - [1]: Sensor vflip + */ + return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20, + BIT(2) | BIT(1), + (value ^ sensor->upside_down) ? + (BIT(2) | BIT(1)) : 0); +} + +static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = ctrl_to_sd(ctrl); + struct ov5640_dev *sensor = to_ov5640_dev(sd); + int val; + + /* v4l2_ctrl_lock() locks our own mutex */ + + switch (ctrl->id) { + case V4L2_CID_AUTOGAIN: + val = ov5640_get_gain(sensor); + if (val < 0) + return val; + sensor->ctrls.gain->val = val; + break; + case V4L2_CID_EXPOSURE_AUTO: + val = ov5640_get_exposure(sensor); + if (val < 0) + return val; + sensor->ctrls.exposure->val = val; + break; + } + + return 0; +} + +static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = ctrl_to_sd(ctrl); + struct ov5640_dev *sensor = to_ov5640_dev(sd); + int ret; + + /* v4l2_ctrl_lock() locks our own mutex */ + + /* + * If the device is not powered up by the host driver do + * not apply any controls to H/W at this time. Instead + * the controls will be restored right after power-up. + */ + if (sensor->power_count == 0) + return 0; + + switch (ctrl->id) { + case V4L2_CID_AUTOGAIN: + ret = ov5640_set_ctrl_gain(sensor, ctrl->val); + break; + case V4L2_CID_EXPOSURE_AUTO: + ret = ov5640_set_ctrl_exposure(sensor, ctrl->val); + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val); + break; + case V4L2_CID_HUE: + ret = ov5640_set_ctrl_hue(sensor, ctrl->val); + break; + case V4L2_CID_CONTRAST: + ret = ov5640_set_ctrl_contrast(sensor, ctrl->val); + break; + case V4L2_CID_SATURATION: + ret = ov5640_set_ctrl_saturation(sensor, ctrl->val); + break; + case V4L2_CID_TEST_PATTERN: + ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val); + break; + case V4L2_CID_POWER_LINE_FREQUENCY: + ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val); + break; + case V4L2_CID_HFLIP: + ret = ov5640_set_ctrl_hflip(sensor, ctrl->val); + break; + case V4L2_CID_VFLIP: + ret = ov5640_set_ctrl_vflip(sensor, ctrl->val); + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static const struct v4l2_ctrl_ops ov5640_ctrl_ops = { + .g_volatile_ctrl = ov5640_g_volatile_ctrl, + .s_ctrl = ov5640_s_ctrl, +}; + +static int ov5640_init_controls(struct ov5640_dev *sensor) +{ + const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops; + struct ov5640_ctrls *ctrls = &sensor->ctrls; + struct v4l2_ctrl_handler *hdl = &ctrls->handler; + int ret; + + v4l2_ctrl_handler_init(hdl, 32); + + /* we can use our own mutex for the ctrl lock */ + hdl->lock = &sensor->lock; + + /* Clock related controls */ + ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE, + 0, INT_MAX, 1, + ov5640_calc_pixel_rate(sensor)); + + /* Auto/manual white balance */ + ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops, + V4L2_CID_AUTO_WHITE_BALANCE, + 0, 1, 1, 1); + ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE, + 0, 4095, 1, 0); + ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE, + 0, 4095, 1, 0); + /* Auto/manual exposure */ + ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops, + V4L2_CID_EXPOSURE_AUTO, + V4L2_EXPOSURE_MANUAL, 0, + V4L2_EXPOSURE_AUTO); + ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, + 0, 65535, 1, 0); + /* Auto/manual gain */ + ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN, + 0, 1, 1, 1); + ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, + 0, 1023, 1, 0); + + ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, + 0, 255, 1, 64); + ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE, + 0, 359, 1, 0); + ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, + 0, 255, 1, 0); + ctrls->test_pattern = + v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(test_pattern_menu) - 1, + 0, 0, test_pattern_menu); + ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, + 0, 1, 1, 0); + ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, + 0, 1, 1, 0); + + ctrls->light_freq = + v4l2_ctrl_new_std_menu(hdl, ops, + V4L2_CID_POWER_LINE_FREQUENCY, + V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, + V4L2_CID_POWER_LINE_FREQUENCY_50HZ); + + if (hdl->error) { + ret = hdl->error; + goto free_ctrls; + } + + ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY; + ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE; + ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE; + + v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false); + v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true); + v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true); + + sensor->sd.ctrl_handler = hdl; + return 0; + +free_ctrls: + v4l2_ctrl_handler_free(hdl); + return ret; +} + +static int ov5640_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_size_enum *fse) +{ + if (fse->pad != 0) + return -EINVAL; + if (fse->index >= OV5640_NUM_MODES) + return -EINVAL; + + fse->min_width = + ov5640_mode_data[fse->index].hact; + fse->max_width = fse->min_width; + fse->min_height = + ov5640_mode_data[fse->index].vact; + fse->max_height = fse->min_height; + + return 0; +} + +static int ov5640_enum_frame_interval( + struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_frame_interval_enum *fie) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + struct v4l2_fract tpf; + int ret; + + if (fie->pad != 0) + return -EINVAL; + if (fie->index >= OV5640_NUM_FRAMERATES) + return -EINVAL; + + tpf.numerator = 1; + tpf.denominator = ov5640_framerates[fie->index]; + + ret = ov5640_try_frame_interval(sensor, &tpf, + fie->width, fie->height); + if (ret < 0) + return -EINVAL; + + fie->interval = tpf; + return 0; +} + +static int ov5640_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *fi) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + + mutex_lock(&sensor->lock); + fi->interval = sensor->frame_interval; + mutex_unlock(&sensor->lock); + + return 0; +} + +static int ov5640_s_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *fi) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + const struct ov5640_mode_info *mode; + int frame_rate, ret = 0; + + if (fi->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (sensor->streaming) { + ret = -EBUSY; + goto out; + } + + mode = sensor->current_mode; + + frame_rate = ov5640_try_frame_interval(sensor, &fi->interval, + mode->hact, mode->vact); + if (frame_rate < 0) { + /* Always return a valid frame interval value */ + fi->interval = sensor->frame_interval; + goto out; + } + + mode = ov5640_find_mode(sensor, frame_rate, mode->hact, + mode->vact, true); + if (!mode) { + ret = -EINVAL; + goto out; + } + + if (mode != sensor->current_mode || + frame_rate != sensor->current_fr) { + sensor->current_fr = frame_rate; + sensor->frame_interval = fi->interval; + sensor->current_mode = mode; + sensor->pending_mode_change = true; + + __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, + ov5640_calc_pixel_rate(sensor)); + } +out: + mutex_unlock(&sensor->lock); + return ret; +} + +static int ov5640_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->pad != 0) + return -EINVAL; + if (code->index >= ARRAY_SIZE(ov5640_formats)) + return -EINVAL; + + code->code = ov5640_formats[code->index].code; + return 0; +} + +static int ov5640_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct ov5640_dev *sensor = to_ov5640_dev(sd); + int ret = 0; + + mutex_lock(&sensor->lock); + + if (sensor->streaming == !enable) { + if (enable && sensor->pending_mode_change) { + ret = ov5640_set_mode(sensor); + if (ret) + goto out; + } + + if (enable && sensor->pending_fmt_change) { + ret = ov5640_set_framefmt(sensor, &sensor->fmt); + if (ret) + goto out; + sensor->pending_fmt_change = false; + } + + if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) + ret = ov5640_set_stream_mipi(sensor, enable); + else + ret = ov5640_set_stream_dvp(sensor, enable); + + if (!ret) + sensor->streaming = enable; + } +out: + mutex_unlock(&sensor->lock); + return ret; +} + +int ov5640_skip_frames(struct v4l2_subdev *sd, u32 *frames) +{ + *frames = OV5640_SKIP_FRAMES; + return 0; +} + +static const struct v4l2_subdev_core_ops ov5640_core_ops = { + .s_power = ov5640_s_power, + .log_status = v4l2_ctrl_subdev_log_status, + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_video_ops ov5640_video_ops = { + .g_frame_interval = ov5640_g_frame_interval, + .s_frame_interval = ov5640_s_frame_interval, + .s_stream = ov5640_s_stream, +}; + +static const struct v4l2_subdev_pad_ops ov5640_pad_ops = { + .enum_mbus_code = ov5640_enum_mbus_code, + .get_fmt = ov5640_get_fmt, + .set_fmt = ov5640_set_fmt, + .enum_frame_size = ov5640_enum_frame_size, + .enum_frame_interval = ov5640_enum_frame_interval, +}; + +static const struct v4l2_subdev_sensor_ops ov5640_sensor_ops = { + .g_skip_frames = ov5640_skip_frames, +}; + +static const struct v4l2_subdev_ops ov5640_subdev_ops = { + .core = &ov5640_core_ops, + .video = &ov5640_video_ops, + .pad = &ov5640_pad_ops, + .sensor = &ov5640_sensor_ops, +}; + +static int ov5640_get_regulators(struct ov5640_dev *sensor) +{ + int i; + + for (i = 0; i < OV5640_NUM_SUPPLIES; i++) + sensor->supplies[i].supply = ov5640_supply_name[i]; + + return devm_regulator_bulk_get(&sensor->i2c_client->dev, + OV5640_NUM_SUPPLIES, + sensor->supplies); +} + +static int ov5640_check_chip_id(struct ov5640_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + int ret = 0; + u16 chip_id; + + ret = ov5640_set_power_on(sensor); + if (ret) + return ret; + + ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id); + if (ret) { + dev_err(&client->dev, "%s: failed to read chip identifier\n", + __func__); + goto power_off; + } + + if (chip_id != OV5640_CHIP_ID) { + dev_err(&client->dev, "%s: wrong chip identifier, expected 0x%x, got 0x%x\n", + __func__, OV5640_CHIP_ID, chip_id); + ret = -ENXIO; + } + dev_err(&client->dev, "%s: chip identifier, got 0x%x\n", + __func__, chip_id); + +power_off: + ov5640_set_power_off(sensor); + return ret; +} + +static int ov5640_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct fwnode_handle *endpoint; + struct ov5640_dev *sensor; + struct v4l2_mbus_framefmt *fmt; + u32 rotation; + int ret; + + sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOMEM; + + sensor->i2c_client = client; + + /* + * default init sequence initialize sensor to + * YUV422 UYVY VGA@30fps + */ + fmt = &sensor->fmt; + fmt->code = MEDIA_BUS_FMT_UYVY8_2X8; + fmt->colorspace = V4L2_COLORSPACE_SRGB; + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); + fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); + fmt->width = 640; + fmt->height = 480; + fmt->field = V4L2_FIELD_NONE; + sensor->frame_interval.numerator = 1; + sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS]; + sensor->current_fr = OV5640_30_FPS; + sensor->current_mode = + &ov5640_mode_data[OV5640_MODE_VGA_640_480]; + sensor->last_mode = sensor->current_mode; + + sensor->ae_target = 52; + + /* optional indication of physical rotation of sensor */ + ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation", + &rotation); + if (!ret) { + switch (rotation) { + case 180: + sensor->upside_down = true; + fallthrough; + case 0: + break; + default: + dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n", + rotation); + } + } + + endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), + NULL); + if (!endpoint) { + dev_err(dev, "endpoint node not found\n"); + return -EINVAL; + } + + ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep); + fwnode_handle_put(endpoint); + if (ret) { + dev_err(dev, "Could not parse endpoint\n"); + return ret; + } + + if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL && + sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY && + sensor->ep.bus_type != V4L2_MBUS_BT656) { + dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type); + return -EINVAL; + } + + /* get system clock (xclk) */ + sensor->xclk = devm_clk_get(dev, "xclk"); + if (IS_ERR(sensor->xclk)) { + dev_err(dev, "failed to get xclk\n"); + return PTR_ERR(sensor->xclk); + } + + sensor->xclk_freq = clk_get_rate(sensor->xclk); + if (sensor->xclk_freq < OV5640_XCLK_MIN || + sensor->xclk_freq > OV5640_XCLK_MAX) { + dev_err(dev, "xclk frequency out of range: %d Hz\n", + sensor->xclk_freq); + return -EINVAL; + } + + /* request optional power down pin */ + sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown", + GPIOD_OUT_HIGH); + if (IS_ERR(sensor->pwdn_gpio)) + return PTR_ERR(sensor->pwdn_gpio); + + /* request optional reset pin */ + sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(sensor->reset_gpio)) + return PTR_ERR(sensor->reset_gpio); + + v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops); + + sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | + V4L2_SUBDEV_FL_HAS_EVENTS; + sensor->pad.flags = MEDIA_PAD_FL_SOURCE; + sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); + if (ret) + return ret; + + ret = ov5640_get_regulators(sensor); + if (ret) + return ret; + + mutex_init(&sensor->lock); + + ret = ov5640_check_chip_id(sensor); + if (ret) + goto entity_cleanup; + + ret = ov5640_init_controls(sensor); + if (ret) + goto entity_cleanup; + + ret = v4l2_async_register_subdev_sensor_common(&sensor->sd); + if (ret) + goto free_ctrls; + + return 0; + +free_ctrls: + v4l2_ctrl_handler_free(&sensor->ctrls.handler); +entity_cleanup: + media_entity_cleanup(&sensor->sd.entity); + mutex_destroy(&sensor->lock); + return ret; +} + +static int ov5640_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov5640_dev *sensor = to_ov5640_dev(sd); + + v4l2_async_unregister_subdev(&sensor->sd); + media_entity_cleanup(&sensor->sd.entity); + v4l2_ctrl_handler_free(&sensor->ctrls.handler); + mutex_destroy(&sensor->lock); + + return 0; +} + +static const struct i2c_device_id ov5640_id[] = { + {"ov5640", 0}, + {}, +}; +MODULE_DEVICE_TABLE(i2c, ov5640_id); + +static const struct of_device_id ov5640_dt_ids[] = { + { .compatible = "ovti,ov5640" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ov5640_dt_ids); + +static struct i2c_driver ov5640_i2c_driver = { + .driver = { + .name = "ov5640", + .of_match_table = ov5640_dt_ids, + }, + .id_table = ov5640_id, + .probe_new = ov5640_probe, + .remove = ov5640_remove, +}; + +module_i2c_driver(ov5640_i2c_driver); + +MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/platform/starfive/v4l2_driver/sc2235.c b/drivers/media/platform/starfive/v4l2_driver/sc2235.c new file mode 100755 index 0000000..045f406 --- /dev/null +++ b/drivers/media/platform/starfive/v4l2_driver/sc2235.c @@ -0,0 +1,1829 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2014-2017 Mentor Graphics Inc. + * Copyright (C) 2021 StarFive Technology Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "stfcamss.h" + +/* min/typical/max system clock (xclk) frequencies */ +#define SC2235_XCLK_MIN 6000000 +#define SC2235_XCLK_MAX 54000000 + +#define SC2235_CHIP_ID (0x2235) + +#define SC2235_REG_CHIP_ID 0x3107 +#define SC2235_REG_AEC_PK_MANUAL 0x3e03 +#define SC2235_REG_AEC_PK_EXPOSURE_HI 0x3e01 +#define SC2235_REG_AEC_PK_EXPOSURE_LO 0x3e02 +#define SC2235_REG_AEC_PK_REAL_GAIN 0x3e08 +#define SC2235_REG_TIMING_HTS 0x320c +#define SC2235_REG_TIMING_VTS 0x320e +#define SC2235_REG_TEST_SET0 0x4501 +#define SC2235_REG_TEST_SET1 0x3902 +#define SC2235_REG_TIMING_TC_REG21 0x3221 +#define SC2235_REG_SC_PLL_CTRL0 0x3039 +#define SC2235_REG_SC_PLL_CTRL1 0x303a + +enum sc2235_mode_id { + SC2235_MODE_1080P_1920_1080 = 0, + SC2235_NUM_MODES, +}; + +enum sc2235_frame_rate { + SC2235_15_FPS = 0, + SC2235_30_FPS, + SC2235_60_FPS, + SC2235_NUM_FRAMERATES, +}; + +struct sc2235_pixfmt { + u32 code; + u32 colorspace; +}; + +static const struct sc2235_pixfmt sc2235_formats[] = { + //{ MEDIA_BUS_FMT_SGBRG10_1X10, V4L2_COLORSPACE_SRGB, }, + { MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB, }, +}; + +static const int sc2235_framerates[] = { + [SC2235_15_FPS] = 15, + [SC2235_30_FPS] = 30, + [SC2235_60_FPS] = 60, +}; + +/* regulator supplies */ +static const char * const sc2235_supply_name[] = { + "DOVDD", /* Digital I/O (1.8V) supply */ + "AVDD", /* Analog (2.8V) supply */ + "DVDD", /* Digital Core (1.5V) supply */ +}; + +#define SC2235_NUM_SUPPLIES ARRAY_SIZE(sc2235_supply_name) + +struct reg_value { + u16 reg_addr; + u8 val; + u8 mask; + u32 delay_ms; +}; + +struct sc2235_mode_info { + enum sc2235_mode_id id; + u32 hact; + u32 htot; + u32 vact; + u32 vtot; + const struct reg_value *reg_data; + u32 reg_data_size; + u32 max_fps; +}; + +struct sc2235_ctrls { + struct v4l2_ctrl_handler handler; + struct v4l2_ctrl *pixel_rate; + struct { + struct v4l2_ctrl *auto_exp; + struct v4l2_ctrl *exposure; + }; + struct { + struct v4l2_ctrl *auto_wb; + struct v4l2_ctrl *blue_balance; + struct v4l2_ctrl *red_balance; + }; + struct { + struct v4l2_ctrl *auto_gain; + struct v4l2_ctrl *gain; + }; + struct v4l2_ctrl *brightness; + struct v4l2_ctrl *light_freq; + struct v4l2_ctrl *saturation; + struct v4l2_ctrl *contrast; + struct v4l2_ctrl *hue; + struct v4l2_ctrl *test_pattern; + struct v4l2_ctrl *hflip; + struct v4l2_ctrl *vflip; +}; + +struct sc2235_dev { + struct i2c_client *i2c_client; + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ + struct clk *xclk; /* system clock to SC2235 */ + u32 xclk_freq; + + struct regulator_bulk_data supplies[SC2235_NUM_SUPPLIES]; + struct gpio_desc *reset_gpio; + struct gpio_desc *pwdn_gpio; + bool upside_down; + + /* lock to protect all members below */ + struct mutex lock; + + int power_count; + + struct v4l2_mbus_framefmt fmt; + bool pending_fmt_change; + + const struct sc2235_mode_info *current_mode; + const struct sc2235_mode_info *last_mode; + enum sc2235_frame_rate current_fr; + struct v4l2_fract frame_interval; + + struct sc2235_ctrls ctrls; + + u32 prev_sysclk, prev_hts; + u32 ae_low, ae_high, ae_target; + + bool pending_mode_change; + bool streaming; +}; + +static inline struct sc2235_dev *to_sc2235_dev(struct v4l2_subdev *sd) +{ + return container_of(sd, struct sc2235_dev, sd); +} + +static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) +{ + return &container_of(ctrl->handler, struct sc2235_dev, + ctrls.handler)->sd; +} + +/* sc2235 initial register */ +static struct reg_value sc2235_init_tbl_1080p_7fps[] = { + {0x0103,0x01,0,0}, + {0x0100,0x00,0,0}, + {0x3039,0x75,0,0}, + {0x320c,0x08,0,0}, + {0x320d,0x98,0,0}, + {0x3222,0x29,0,0}, + {0x3235,0x04,0,0}, + {0x3236,0x63,0,0}, + {0x3237,0x08,0,0}, + {0x3238,0x68,0,0}, + {0x3301,0x04,0,0}, + {0x3303,0x20,0,0}, + {0x3306,0x1a,0,0}, + {0x3309,0xa0,0,0}, + {0x330b,0x54,0,0}, + {0x330e,0x30,0,0}, + {0x3313,0x05,0,0}, + {0x331e,0x0d,0,0}, + {0x331f,0x8d,0,0}, + {0x3320,0x0f,0,0}, + {0x3321,0x8f,0,0}, + {0x3340,0x06,0,0}, + {0x3341,0x50,0,0}, + {0x3342,0x04,0,0}, + {0x3343,0x20,0,0}, + {0x3348,0x07,0,0}, + {0x3349,0x80,0,0}, + {0x334a,0x04,0,0}, + {0x334b,0x20,0,0}, + {0x335e,0x01,0,0}, + {0x335f,0x03,0,0}, + {0x3364,0x05,0,0}, + {0x3366,0x7c,0,0}, + {0x3367,0x08,0,0}, + {0x3368,0x02,0,0}, + {0x3369,0x00,0,0}, + {0x336a,0x00,0,0}, + {0x336b,0x00,0,0}, + {0x337c,0x04,0,0}, + {0x337d,0x06,0,0}, + {0x337f,0x03,0,0}, + {0x3380,0x04,0,0}, + {0x3381,0x0a,0,0}, + {0x33a0,0x05,0,0}, + {0x33b5,0x10,0,0}, + {0x3621,0x28,0,0}, + {0x3622,0x06,0,0}, + {0x3625,0x02,0,0}, + {0x3630,0x48,0,0}, + {0x3631,0x84,0,0}, + {0x3632,0x88,0,0}, + {0x3633,0x42,0,0}, + {0x3634,0x42,0,0}, + {0x3636,0x24,0,0}, + {0x3635,0xc1,0,0}, + {0x3637,0x14,0,0}, + {0x3638,0x1f,0,0}, + {0x363b,0x09,0,0}, + {0x3639,0x09,0,0}, + {0x363c,0x07,0,0}, + {0x366e,0x08,0,0}, + {0x3670,0x08,0,0}, + {0x366f,0x2f,0,0}, + {0x3677,0x1f,0,0}, + {0x3678,0x42,0,0}, + {0x3679,0x43,0,0}, + {0x367e,0x07,0,0}, + {0x367f,0x0f,0,0}, + {0x3802,0x01,0,0}, + {0x3901,0x02,0,0}, + {0x3908,0x11,0,0}, + {0x391b,0x4d,0,0}, + {0x391e,0x00,0,0}, + {0x3d08,0x02,0,0}, + {0x3e01,0x46,0,0}, + {0x3e03,0x0b,0,0}, + {0x3f00,0x07,0,0}, + {0x3f04,0x08,0,0}, + {0x3f05,0x74,0,0}, + {0x4500,0x59,0,0}, + {0x5780,0xff,0,0}, + {0x5781,0x04,0,0}, + {0x5785,0x18,0,0}, + {0x0100,0x01,0,0}, + {0x330b,0x5d,0,0}, + {0x3301,0x0a,0,0}, + {0x3631,0x88,0,0}, + {0x366f,0x2f,0,0}, + + {0x3d08,0x02,0,0},//hs-vs polity +}; + +static struct reg_value sc2235_setting_1080P_1920_1080[] = { + +}; + +/* power-on sensor init reg table */ +static const struct sc2235_mode_info sc2235_mode_init_data = { + SC2235_MODE_1080P_1920_1080, + 1920, 0x8ca, 1080, 0x4b0, + + sc2235_init_tbl_1080p_7fps, + ARRAY_SIZE(sc2235_init_tbl_1080p_7fps), + SC2235_60_FPS, +}; + +static const struct sc2235_mode_info +sc2235_mode_data[SC2235_NUM_MODES] = { + {SC2235_MODE_1080P_1920_1080, + 1920, 0x8ca, 1080, 0x4b0, + sc2235_setting_1080P_1920_1080, + ARRAY_SIZE(sc2235_setting_1080P_1920_1080), + SC2235_60_FPS}, +}; + +static int sc2235_write_reg(struct sc2235_dev *sensor, u16 reg, u8 val) +{ + struct i2c_client *client = sensor->i2c_client; + struct i2c_msg msg; + u8 buf[3]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xff; + buf[2] = val; + + msg.addr = client->addr; + msg.flags = client->flags; + msg.buf = buf; + msg.len = sizeof(buf); + + ret = i2c_transfer(client->adapter, &msg, 1); + if (ret < 0) { + dev_err(&client->dev, "%s: error: reg=%x, val=%x\n", + __func__, reg, val); + return ret; + } + + return 0; +} + +static int sc2235_read_reg(struct sc2235_dev *sensor, u16 reg, u8 *val) +{ + struct i2c_client *client = sensor->i2c_client; + struct i2c_msg msg[2]; + u8 buf[2]; + int ret; + + buf[0] = reg >> 8; + buf[1] = reg & 0xff; + + msg[0].addr = client->addr; + msg[0].flags = client->flags; + msg[0].buf = buf; + msg[0].len = sizeof(buf); + + msg[1].addr = client->addr; + msg[1].flags = client->flags | I2C_M_RD; + msg[1].buf = buf; + msg[1].len = 1; + + ret = i2c_transfer(client->adapter, msg, 2); + if (ret < 0) { + dev_err(&client->dev, "%s: error: reg=%x\n", + __func__, reg); + return ret; + } + + *val = buf[0]; + return 0; +} + +static int sc2235_read_reg16(struct sc2235_dev *sensor, u16 reg, u16 *val) +{ + u8 hi, lo; + int ret; + + ret = sc2235_read_reg(sensor, reg, &hi); + if (ret) + return ret; + ret = sc2235_read_reg(sensor, reg + 1, &lo); + if (ret) + return ret; + + *val = ((u16)hi << 8) | (u16)lo; + return 0; +} + +static int sc2235_write_reg16(struct sc2235_dev *sensor, u16 reg, u16 val) +{ + int ret; + + ret = sc2235_write_reg(sensor, reg, val >> 8); + if (ret) + return ret; + + return sc2235_write_reg(sensor, reg + 1, val & 0xff); +} + +static int sc2235_mod_reg(struct sc2235_dev *sensor, u16 reg, + u8 mask, u8 val) +{ + u8 readval; + int ret; + + ret = sc2235_read_reg(sensor, reg, &readval); + if (ret) + return ret; + + readval &= ~mask; + val &= mask; + val |= readval; + + return sc2235_write_reg(sensor, reg, val); +} + +#define SC2235_PLL_PREDIV 3 + +#define SC2235_SYSDIV_MIN 0 +#define SC2235_SYSDIV_MAX 7 + +#define SC2235_PLL_MULT_MIN 0 +#define SC2235_PLL_MULT_MAX 63 + +static unsigned long sc2235_compute_sys_clk(struct sc2235_dev *sensor, + u8 pll_pre, u8 pll_mult, + u8 sysdiv) +{ + unsigned long sysclk = + sensor->xclk_freq * (64 - pll_mult) / (pll_pre * (sysdiv + 1)); + + /* PLL1 output cannot exceed 1GHz. */ + if (sysclk / 1000000 > 1000) + return 0; + + return sysclk; +} + +static unsigned long sc2235_calc_sys_clk(struct sc2235_dev *sensor, + unsigned long rate, + u8 *pll_prediv, u8 *pll_mult, + u8 *sysdiv) +{ + unsigned long best = ~0; + u8 best_sysdiv = 1, best_mult = 1; + u8 _sysdiv, _pll_mult; + + for (_sysdiv = SC2235_SYSDIV_MIN; + _sysdiv <= SC2235_SYSDIV_MAX; + _sysdiv++) { + for (_pll_mult = SC2235_PLL_MULT_MIN; + _pll_mult <= SC2235_PLL_MULT_MAX; + _pll_mult++) { + unsigned long _rate; + + _rate = sc2235_compute_sys_clk(sensor, + SC2235_PLL_PREDIV, + _pll_mult, _sysdiv); + + /* + * We have reached the maximum allowed PLL1 output, + * increase sysdiv. + */ + if (!_rate) + break; + + /* + * Prefer rates above the expected clock rate than + * below, even if that means being less precise. + */ + if (_rate < rate) + continue; + + if (abs(rate - _rate) < abs(rate - best)) { + best = _rate; + best_sysdiv = _sysdiv; + best_mult = _pll_mult; + } + + if (_rate == rate) + goto out; + } + } + +out: + *sysdiv = best_sysdiv; + *pll_prediv = SC2235_PLL_PREDIV; + *pll_mult = best_mult; + + return best; +} + +static int sc2235_set_timings(struct sc2235_dev *sensor, + const struct sc2235_mode_info *mode) +{ + int ret = 0; + + return ret; +} + +static int sc2235_load_regs(struct sc2235_dev *sensor, + const struct sc2235_mode_info *mode) +{ + const struct reg_value *regs = mode->reg_data; + unsigned int i; + u32 delay_ms; + u16 reg_addr; + u8 mask, val; + int ret = 0; + + st_info(ST_SENSOR, "%s, mode = 0x%x\n", __func__, mode->id); + for (i = 0; i < mode->reg_data_size; ++i, ++regs) { + delay_ms = regs->delay_ms; + reg_addr = regs->reg_addr; + val = regs->val; + mask = regs->mask; + + if (mask) + ret = sc2235_mod_reg(sensor, reg_addr, mask, val); + else + ret = sc2235_write_reg(sensor, reg_addr, val); + if (ret) + break; + + if (delay_ms) + usleep_range(1000 * delay_ms, 1000 * delay_ms + 100); + } + + return sc2235_set_timings(sensor, mode); +} + +static int sc2235_set_autoexposure(struct sc2235_dev *sensor, bool on) +{ + return sc2235_mod_reg(sensor, SC2235_REG_AEC_PK_MANUAL, + BIT(0), on ? 0 : BIT(0)); +} + +static int sc2235_get_exposure(struct sc2235_dev *sensor) +{ + int exp = 0, ret = 0; + u8 temp; + + ret = sc2235_read_reg(sensor, SC2235_REG_AEC_PK_EXPOSURE_HI, &temp); + if (ret) + return ret; + exp |= (int)temp << 8; + ret = sc2235_read_reg(sensor, SC2235_REG_AEC_PK_EXPOSURE_LO, &temp); + if (ret) + return ret; + exp |= (int)temp; + + return exp >> 4; +} + +static int sc2235_set_exposure(struct sc2235_dev *sensor, u32 exposure) +{ + int ret; + + exposure <<= 4; + + ret = sc2235_write_reg(sensor, + SC2235_REG_AEC_PK_EXPOSURE_LO, + exposure & 0xff); + if (ret) + return ret; + return sc2235_write_reg(sensor, + SC2235_REG_AEC_PK_EXPOSURE_HI, + (exposure >> 8) & 0xff); +} + +static int sc2235_get_gain(struct sc2235_dev *sensor) +{ + u16 gain; + int ret; + + ret = sc2235_read_reg16(sensor, SC2235_REG_AEC_PK_REAL_GAIN, &gain); + if (ret) + return ret; + + return gain & 0x1fff; +} + +static int sc2235_set_gain(struct sc2235_dev *sensor, int gain) +{ + return sc2235_write_reg16(sensor, SC2235_REG_AEC_PK_REAL_GAIN, + (u16)gain & 0x1fff); +} + +static int sc2235_set_autogain(struct sc2235_dev *sensor, bool on) +{ + return sc2235_mod_reg(sensor, SC2235_REG_AEC_PK_MANUAL, + BIT(1), on ? 0 : BIT(1)); +} + +static int sc2235_set_stream_dvp(struct sc2235_dev *sensor, bool on) +{ + return 0; +} + +static int sc2235_get_sysclk(struct sc2235_dev *sensor) +{ + return 0; +} + +static int sc2235_set_night_mode(struct sc2235_dev *sensor) +{ + return 0; +} + +static int sc2235_get_hts(struct sc2235_dev *sensor) +{ + u16 hts; + int ret; + + ret = sc2235_read_reg16(sensor, SC2235_REG_TIMING_HTS, &hts); + if (ret) + return ret; + return hts; +} + +static int sc2235_get_vts(struct sc2235_dev *sensor) +{ + u16 vts; + int ret; + + ret = sc2235_read_reg16(sensor, SC2235_REG_TIMING_VTS, &vts); + if (ret) + return ret; + return vts; +} + +static int sc2235_set_vts(struct sc2235_dev *sensor, int vts) +{ + return sc2235_write_reg16(sensor, SC2235_REG_TIMING_VTS, vts); +} + +static int sc2235_get_light_freq(struct sc2235_dev *sensor) +{ + return 0; +} + +static int sc2235_set_bandingfilter(struct sc2235_dev *sensor) +{ + return 0; +} + +static int sc2235_set_ae_target(struct sc2235_dev *sensor, int target) +{ + return 0; +} + +static int sc2235_get_binning(struct sc2235_dev *sensor) +{ + return 0; +} + +static int sc2235_set_binning(struct sc2235_dev *sensor, bool enable) +{ + return 0; +} + +static const struct sc2235_mode_info * +sc2235_find_mode(struct sc2235_dev *sensor, enum sc2235_frame_rate fr, + int width, int height, bool nearest) +{ + const struct sc2235_mode_info *mode; + + mode = v4l2_find_nearest_size(sc2235_mode_data, + ARRAY_SIZE(sc2235_mode_data), + hact, vact, + width, height); + + if (!mode || + (!nearest && (mode->hact != width || mode->vact != height))) + return NULL; + + /* Check to see if the current mode exceeds the max frame rate */ + if (sc2235_framerates[fr] > sc2235_framerates[mode->max_fps]) + return NULL; + + return mode; +} + +static u64 sc2235_calc_pixel_rate(struct sc2235_dev *sensor) +{ + u64 rate; + + rate = sensor->current_mode->vtot * sensor->current_mode->htot; + rate *= sc2235_framerates[sensor->current_fr]; + + return rate; +} + +/* + * sc2235_set_dvp_pclk() - Calculate the clock tree configuration values + * for the dvp output. + * + * @rate: The requested bandwidth per lane in bytes per second. + * 'Bandwidth Per Lane' is calculated as: + * rate = HTOT * VTOT * FPS; + * + * This function use the requested bandwidth to calculate: + * - rate = xclk * (64 - M) / (N * (S + 1)); + * + */ + +#define PLL_PREDIV 1 +#define PLL_SYSEL 0 + +static int sc2235_set_dvp_pclk(struct sc2235_dev *sensor, + unsigned long rate) +{ + const struct sc2235_mode_info *mode = sensor->current_mode; + const struct sc2235_mode_info *orig_mode = sensor->last_mode; + u8 prediv, mult, sysdiv; + int ret = 0; + + sc2235_calc_sys_clk(sensor, rate, &prediv, &mult, + &sysdiv); + + st_info(ST_SENSOR, "%s, prediv = %d, mult = %d, sysdiv = %d\n", + __func__, prediv, mult, sysdiv); + + ret = sc2235_mod_reg(sensor, SC2235_REG_SC_PLL_CTRL0, 0x7f, + (sysdiv << 4) | (prediv << 1) | ((mult & 0x20) >> 5)); + if (ret) + return ret; + + return sc2235_mod_reg(sensor, SC2235_REG_SC_PLL_CTRL1, + 0xf8, mult << 3); +} + +/* + * if sensor changes inside scaling or subsampling + * change mode directly + */ +static int sc2235_set_mode_direct(struct sc2235_dev *sensor, + const struct sc2235_mode_info *mode) +{ + if (!mode->reg_data) + return -EINVAL; + + /* Write capture setting */ + return sc2235_load_regs(sensor, mode); +} + +static int sc2235_set_mode(struct sc2235_dev *sensor) +{ + const struct sc2235_mode_info *mode = sensor->current_mode; + const struct sc2235_mode_info *orig_mode = sensor->last_mode; + bool auto_gain = sensor->ctrls.auto_gain->val == 1; + bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO; + unsigned long rate; + int ret = 0; + + /* auto gain and exposure must be turned off when changing modes */ + if (auto_gain) { + ret = sc2235_set_autogain(sensor, false); + if (ret) + return ret; + } +#if 0 + /* This issue will be addressed in the EVB board*/ + /* This action will result in poor image display 2021 1111*/ + if (auto_exp) { + ret = sc2235_set_autoexposure(sensor, false); + if (ret) + goto restore_auto_gain; + } + + rate = sc2235_calc_pixel_rate(sensor); + if (sensor->ep.bus_type == V4L2_MBUS_PARALLEL) + ret = sc2235_set_dvp_pclk(sensor, rate); + + + if (ret < 0) + return 0; + + ret = sc2235_set_mode_direct(sensor, mode); + if (ret < 0) + goto restore_auto_exp_gain; + + + /* restore auto gain and exposure */ + if (auto_gain) + sc2235_set_autogain(sensor, true); + if (auto_exp) + sc2235_set_autoexposure(sensor, true); + + + sensor->pending_mode_change = false; + sensor->last_mode = mode; + return 0; + +restore_auto_exp_gain: + if (auto_exp) + sc2235_set_autoexposure(sensor, true); +restore_auto_gain: + if (auto_gain) + sc2235_set_autogain(sensor, true); +#endif + return ret; +} + +static int sc2235_set_framefmt(struct sc2235_dev *sensor, + struct v4l2_mbus_framefmt *format); + +/* restore the last set video mode after chip power-on */ +static int sc2235_restore_mode(struct sc2235_dev *sensor) +{ + int ret; + unsigned int hs_polity = 1; /* 1: valid when high; 0: valid when low */ + unsigned int vs_polity = 1; /* 1: valid when high; 0: valid when low */ + unsigned char val; + + /* first load the initial register values */ + ret = sc2235_load_regs(sensor, &sc2235_mode_init_data); + if (ret < 0) + return ret; + sensor->last_mode = &sc2235_mode_init_data; + val = (vs_polity<<1)|((!hs_polity)<<2); + sc2235_write_reg16(sensor, 0x3d08, val); + + /* now restore the last capture mode */ + ret = sc2235_set_mode(sensor); + if (ret < 0) + return ret; + + return sc2235_set_framefmt(sensor, &sensor->fmt); +} + +static void sc2235_power(struct sc2235_dev *sensor, bool enable) +{ + if (!sensor->pwdn_gpio) + return; + gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1); +} + +static void sc2235_reset(struct sc2235_dev *sensor) +{ + if (!sensor->reset_gpio) + return; + + gpiod_set_value_cansleep(sensor->reset_gpio, 0); + + /* camera power cycle */ + sc2235_power(sensor, false); + usleep_range(5000, 10000); + sc2235_power(sensor, true); + usleep_range(5000, 10000); + + gpiod_set_value_cansleep(sensor->reset_gpio, 1); + usleep_range(1000, 2000); + + gpiod_set_value_cansleep(sensor->reset_gpio, 0); + usleep_range(20000, 25000); +} + +static int sc2235_set_power_on(struct sc2235_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + int ret; + + ret = clk_prepare_enable(sensor->xclk); + if (ret) { + dev_err(&client->dev, "%s: failed to enable clock\n", + __func__); + return ret; + } + + ret = regulator_bulk_enable(SC2235_NUM_SUPPLIES, + sensor->supplies); + if (ret) { + dev_err(&client->dev, "%s: failed to enable regulators\n", + __func__); + goto xclk_off; + } + + sc2235_reset(sensor); + sc2235_power(sensor, true); + + return 0; + +xclk_off: + clk_disable_unprepare(sensor->xclk); + return ret; +} + +static void sc2235_set_power_off(struct sc2235_dev *sensor) +{ + sc2235_power(sensor, false); + regulator_bulk_disable(SC2235_NUM_SUPPLIES, sensor->supplies); + clk_disable_unprepare(sensor->xclk); +} + +static int sc2235_set_power_dvp(struct sc2235_dev *sensor, bool on) +{ + unsigned int flags = sensor->ep.bus.parallel.flags; + bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656; + u8 polarities = 0; + int ret; + + /* + * configure parallel port control lines polarity + * + * POLARITY CTRL0 + * - [5]: PCLK polarity (0: active low, 1: active high) + * - [1]: HREF polarity (0: active low, 1: active high) + * - [0]: VSYNC polarity (mismatch here between + * datasheet and hardware, 0 is active high + * and 1 is active low...) + */ + if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) + polarities |= BIT(1); + if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) + polarities |= BIT(0); + if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING) + polarities |= BIT(5); + + // ret = sc2235_write_reg(sensor, + // SC2235_REG_POLARITY_CTRL00, + // polarities); + // if (ret) + // return ret; + + return 0; +} + +static int sc2235_set_power(struct sc2235_dev *sensor, bool on) +{ + int ret = 0; + + if (on) { + ret = sc2235_set_power_on(sensor); + if (ret) + return ret; + + ret = sc2235_restore_mode(sensor); + if (ret) + goto power_off; + } + + if (sensor->ep.bus_type == V4L2_MBUS_PARALLEL) + ret = sc2235_set_power_dvp(sensor, on); + if (ret) + goto power_off; + + if (!on) + sc2235_set_power_off(sensor); + + return 0; + +power_off: + sc2235_set_power_off(sensor); + + return ret; +} + +static int sc2235_s_power(struct v4l2_subdev *sd, int on) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + int ret = 0; + + mutex_lock(&sensor->lock); + + /* + * If the power count is modified from 0 to != 0 or from != 0 to 0, + * update the power state. + */ + if (sensor->power_count == !on) { + ret = sc2235_set_power(sensor, !!on); + if (ret) + goto out; + } + + /* Update the power count. */ + sensor->power_count += on ? 1 : -1; + WARN_ON(sensor->power_count < 0); +out: + mutex_unlock(&sensor->lock); + + if (on && !ret && sensor->power_count == 1) { + /* restore controls */ + ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler); + } + + return ret; +} + +static int sc2235_try_frame_interval(struct sc2235_dev *sensor, + struct v4l2_fract *fi, + u32 width, u32 height) +{ + const struct sc2235_mode_info *mode; + enum sc2235_frame_rate rate = SC2235_15_FPS; + int minfps, maxfps, best_fps, fps; + int i; + + minfps = sc2235_framerates[SC2235_15_FPS]; + maxfps = sc2235_framerates[SC2235_60_FPS]; + + if (fi->numerator == 0) { + fi->denominator = maxfps; + fi->numerator = 1; + rate = SC2235_60_FPS; + goto find_mode; + } + + fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator), + minfps, maxfps); + + best_fps = minfps; + for (i = 0; i < ARRAY_SIZE(sc2235_framerates); i++) { + int curr_fps = sc2235_framerates[i]; + + if (abs(curr_fps - fps) < abs(best_fps - fps)) { + best_fps = curr_fps; + rate = i; + } + } + + fi->numerator = 1; + fi->denominator = best_fps; + +find_mode: + mode = sc2235_find_mode(sensor, rate, width, height, false); + return mode ? rate : -EINVAL; +} + +static int sc2235_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + struct v4l2_mbus_framefmt *fmt; + + if (format->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + fmt = v4l2_subdev_get_try_format(&sensor->sd, state, + format->pad); + else + fmt = &sensor->fmt; + + format->format = *fmt; + + mutex_unlock(&sensor->lock); + + return 0; +} + +static int sc2235_try_fmt_internal(struct v4l2_subdev *sd, + struct v4l2_mbus_framefmt *fmt, + enum sc2235_frame_rate fr, + const struct sc2235_mode_info **new_mode) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + const struct sc2235_mode_info *mode; + int i; + + mode = sc2235_find_mode(sensor, fr, fmt->width, fmt->height, true); + if (!mode) + return -EINVAL; + fmt->width = mode->hact; + fmt->height = mode->vact; + + if (new_mode) + *new_mode = mode; + + for (i = 0; i < ARRAY_SIZE(sc2235_formats); i++) + if (sc2235_formats[i].code == fmt->code) + break; + if (i >= ARRAY_SIZE(sc2235_formats)) + i = 0; + + fmt->code = sc2235_formats[i].code; + fmt->colorspace = sc2235_formats[i].colorspace; + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); + fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); + + return 0; +} + +static int sc2235_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + const struct sc2235_mode_info *new_mode; + struct v4l2_mbus_framefmt *mbus_fmt = &format->format; + struct v4l2_mbus_framefmt *fmt; + int ret; + + if (format->pad != 0) + return -EINVAL; + mutex_lock(&sensor->lock); + + if (sensor->streaming) { + ret = -EBUSY; + goto out; + } + + ret = sc2235_try_fmt_internal(sd, mbus_fmt, 0, &new_mode); + if (ret) + goto out; + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + fmt = v4l2_subdev_get_try_format(sd, state, 0); + else + fmt = &sensor->fmt; + + if (mbus_fmt->code != sensor->fmt.code) + sensor->pending_fmt_change = true; + + *fmt = *mbus_fmt; + + if (new_mode != sensor->current_mode) { + sensor->current_mode = new_mode; + sensor->pending_mode_change = true; + } + if (new_mode->max_fps < sensor->current_fr) { + sensor->current_fr = new_mode->max_fps; + sensor->frame_interval.numerator = 1; + sensor->frame_interval.denominator = + sc2235_framerates[sensor->current_fr]; + sensor->current_mode = new_mode; + sensor->pending_mode_change = true; + } + + __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, + sc2235_calc_pixel_rate(sensor)); +out: + mutex_unlock(&sensor->lock); + return ret; +} + +static int sc2235_set_framefmt(struct sc2235_dev *sensor, + struct v4l2_mbus_framefmt *format) +{ + int ret = 0; + + switch (format->code) { + default: + return ret; + } + return ret; +} + +/* + * Sensor Controls. + */ + +static int sc2235_set_ctrl_hue(struct sc2235_dev *sensor, int value) +{ + int ret = 0; + return ret; +} + +static int sc2235_set_ctrl_contrast(struct sc2235_dev *sensor, int value) +{ + int ret = 0; + return ret; +} + +static int sc2235_set_ctrl_saturation(struct sc2235_dev *sensor, int value) +{ + int ret = 0; + return ret; +} + +static int sc2235_set_ctrl_white_balance(struct sc2235_dev *sensor, int awb) +{ + int ret = 0; + return ret; +} + +static int sc2235_set_ctrl_exposure(struct sc2235_dev *sensor, + enum v4l2_exposure_auto_type auto_exposure) +{ + struct sc2235_ctrls *ctrls = &sensor->ctrls; + bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO); + int ret = 0; + + if (ctrls->auto_exp->is_new) { + ret = sc2235_set_autoexposure(sensor, auto_exp); + if (ret) + return ret; + } + + if (!auto_exp && ctrls->exposure->is_new) { + u16 max_exp = 0; + + ret = sc2235_get_vts(sensor); + if (ret < 0) + return ret; + max_exp += ret - 4; + ret = 0; + + if (ctrls->exposure->val < max_exp) + ret = sc2235_set_exposure(sensor, ctrls->exposure->val); + } + + return ret; +} + +static int sc2235_set_ctrl_gain(struct sc2235_dev *sensor, bool auto_gain) +{ + struct sc2235_ctrls *ctrls = &sensor->ctrls; + int ret = 0; + + if (ctrls->auto_gain->is_new) { + ret = sc2235_set_autogain(sensor, auto_gain); + if (ret) + return ret; + } + + if (!auto_gain && ctrls->gain->is_new) + ret = sc2235_set_gain(sensor, ctrls->gain->val); + + return ret; +} + +static const char * const test_pattern_menu[] = { + "Disabled", + "Black bars", + "Auto Black bars", +}; + +#define SC2235_TEST_ENABLE BIT(3) +#define SC2235_TEST_BLACK (3 << 0) + +static int sc2235_set_ctrl_test_pattern(struct sc2235_dev *sensor, int value) +{ + int ret = 0; + /* + *For 7110 platform, refer to 1125 FW code configuration. This operation will cause the image to be white. + */ +#if 0 + ret = sc2235_mod_reg(sensor, SC2235_REG_TEST_SET0, BIT(3), + !!value << 3); + + ret |= sc2235_mod_reg(sensor, SC2235_REG_TEST_SET1, BIT(6), + (value >> 1) << 6); +#endif + return ret; +} + +static int sc2235_set_ctrl_light_freq(struct sc2235_dev *sensor, int value) +{ + return 0; +} + +static int sc2235_set_ctrl_hflip(struct sc2235_dev *sensor, int value) +{ + return sc2235_mod_reg(sensor, SC2235_REG_TIMING_TC_REG21, + BIT(2) | BIT(1), + (!(value ^ sensor->upside_down)) ? + (BIT(2) | BIT(1)) : 0); +} + +static int sc2235_set_ctrl_vflip(struct sc2235_dev *sensor, int value) +{ + return sc2235_mod_reg(sensor, SC2235_REG_TIMING_TC_REG21, + BIT(6) | BIT(5), + (value ^ sensor->upside_down) ? + (BIT(6) | BIT(5)) : 0); +} + +static int sc2235_g_volatile_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = ctrl_to_sd(ctrl); + struct sc2235_dev *sensor = to_sc2235_dev(sd); + int val; + + /* v4l2_ctrl_lock() locks our own mutex */ + + switch (ctrl->id) { + case V4L2_CID_AUTOGAIN: + val = sc2235_get_gain(sensor); + if (val < 0) + return val; + sensor->ctrls.gain->val = val; + break; + case V4L2_CID_EXPOSURE_AUTO: + val = sc2235_get_exposure(sensor); + if (val < 0) + return val; + sensor->ctrls.exposure->val = val; + break; + } + + return 0; +} + +static int sc2235_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = ctrl_to_sd(ctrl); + struct sc2235_dev *sensor = to_sc2235_dev(sd); + int ret; + + /* v4l2_ctrl_lock() locks our own mutex */ + + /* + * If the device is not powered up by the host driver do + * not apply any controls to H/W at this time. Instead + * the controls will be restored right after power-up. + */ + if (sensor->power_count == 0) + return 0; + + switch (ctrl->id) { + case V4L2_CID_AUTOGAIN: + ret = sc2235_set_ctrl_gain(sensor, ctrl->val); + break; + case V4L2_CID_EXPOSURE_AUTO: + ret = sc2235_set_ctrl_exposure(sensor, ctrl->val); + break; + case V4L2_CID_AUTO_WHITE_BALANCE: + ret = sc2235_set_ctrl_white_balance(sensor, ctrl->val); + break; + case V4L2_CID_HUE: + ret = sc2235_set_ctrl_hue(sensor, ctrl->val); + break; + case V4L2_CID_CONTRAST: + ret = sc2235_set_ctrl_contrast(sensor, ctrl->val); + break; + case V4L2_CID_SATURATION: + ret = sc2235_set_ctrl_saturation(sensor, ctrl->val); + break; + case V4L2_CID_TEST_PATTERN: + ret = sc2235_set_ctrl_test_pattern(sensor, ctrl->val); + break; + case V4L2_CID_POWER_LINE_FREQUENCY: + ret = sc2235_set_ctrl_light_freq(sensor, ctrl->val); + break; + case V4L2_CID_HFLIP: + ret = sc2235_set_ctrl_hflip(sensor, ctrl->val); + break; + case V4L2_CID_VFLIP: + ret = sc2235_set_ctrl_vflip(sensor, ctrl->val); + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static const struct v4l2_ctrl_ops sc2235_ctrl_ops = { + .g_volatile_ctrl = sc2235_g_volatile_ctrl, + .s_ctrl = sc2235_s_ctrl, +}; + +static int sc2235_init_controls(struct sc2235_dev *sensor) +{ + const struct v4l2_ctrl_ops *ops = &sc2235_ctrl_ops; + struct sc2235_ctrls *ctrls = &sensor->ctrls; + struct v4l2_ctrl_handler *hdl = &ctrls->handler; + int ret; + + v4l2_ctrl_handler_init(hdl, 32); + + /* we can use our own mutex for the ctrl lock */ + hdl->lock = &sensor->lock; + + /* Clock related controls */ + ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE, + 0, INT_MAX, 1, + sc2235_calc_pixel_rate(sensor)); + + /* Auto/manual white balance */ + ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops, + V4L2_CID_AUTO_WHITE_BALANCE, + 0, 1, 1, 1); + ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE, + 0, 4095, 1, 0); + ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE, + 0, 4095, 1, 0); + /* Auto/manual exposure */ +#if 0 + /* + *For 7110 platform, This operation will cause the image to be white. + */ + ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops, + V4L2_CID_EXPOSURE_AUTO, + V4L2_EXPOSURE_MANUAL, 0, + V4L2_EXPOSURE_AUTO); + ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, + 0, 65535, 1, 0); + /* Auto/manual gain */ + ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN, + 0, 1, 1, 1); + ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, + 0, 1023, 1, 0); +#else + ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops, + V4L2_CID_EXPOSURE_AUTO, + V4L2_EXPOSURE_MANUAL, 0, + 1); + ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, + 0, 65535, 1, 0x4600); + /* Auto/manual gain */ + ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN, + 0, 1, 1, 0); + ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, + 0, 1023, 1, 0x10); +#endif + ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, + 0, 255, 1, 64); + ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE, + 0, 359, 1, 0); + ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, + 0, 255, 1, 0); + ctrls->test_pattern = + v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(test_pattern_menu) - 1, + 0, 0, test_pattern_menu); //0x02 + ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, + 0, 1, 1, 1); + ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, + 0, 1, 1, 0); + + ctrls->light_freq = + v4l2_ctrl_new_std_menu(hdl, ops, + V4L2_CID_POWER_LINE_FREQUENCY, + V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0, + V4L2_CID_POWER_LINE_FREQUENCY_50HZ); + + if (hdl->error) { + ret = hdl->error; + goto free_ctrls; + } + + ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY; + ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE; + ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE; + + v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false); + v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true); + v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true); + + sensor->sd.ctrl_handler = hdl; + return 0; + +free_ctrls: + v4l2_ctrl_handler_free(hdl); + return ret; +} + +static int sc2235_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_size_enum *fse) +{ + if (fse->pad != 0) + return -EINVAL; + if (fse->index >= SC2235_NUM_MODES) + return -EINVAL; + + fse->min_width = + sc2235_mode_data[fse->index].hact; + fse->max_width = fse->min_width; + fse->min_height = + sc2235_mode_data[fse->index].vact; + fse->max_height = fse->min_height; + + return 0; +} + +static int sc2235_enum_frame_interval( + struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_interval_enum *fie) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + struct v4l2_fract tpf; + int ret; + + if (fie->pad != 0) + return -EINVAL; + if (fie->index >= SC2235_NUM_FRAMERATES) + return -EINVAL; + + tpf.numerator = 1; + tpf.denominator = sc2235_framerates[fie->index]; + + ret = sc2235_try_frame_interval(sensor, &tpf, + fie->width, fie->height); + if (ret < 0) + return -EINVAL; + + fie->interval = tpf; + return 0; +} + +static int sc2235_g_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *fi) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + + mutex_lock(&sensor->lock); + fi->interval = sensor->frame_interval; + mutex_unlock(&sensor->lock); + + return 0; +} + +static int sc2235_s_frame_interval(struct v4l2_subdev *sd, + struct v4l2_subdev_frame_interval *fi) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + const struct sc2235_mode_info *mode; + int frame_rate, ret = 0; + + if (fi->pad != 0) + return -EINVAL; + + mutex_lock(&sensor->lock); + + if (sensor->streaming) { + ret = -EBUSY; + goto out; + } + + mode = sensor->current_mode; + + frame_rate = sc2235_try_frame_interval(sensor, &fi->interval, + mode->hact, mode->vact); + if (frame_rate < 0) { + /* Always return a valid frame interval value */ + fi->interval = sensor->frame_interval; + goto out; + } + + mode = sc2235_find_mode(sensor, frame_rate, mode->hact, + mode->vact, true); + if (!mode) { + ret = -EINVAL; + goto out; + } + + if (mode != sensor->current_mode || + frame_rate != sensor->current_fr) { + sensor->current_fr = frame_rate; + sensor->frame_interval = fi->interval; + sensor->current_mode = mode; + sensor->pending_mode_change = true; + + __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, + sc2235_calc_pixel_rate(sensor)); + } +out: + mutex_unlock(&sensor->lock); + return ret; +} + +static int sc2235_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->pad != 0) + return -EINVAL; + if (code->index >= ARRAY_SIZE(sc2235_formats)) + return -EINVAL; + + code->code = sc2235_formats[code->index].code; + return 0; +} + +static int sc2235_s_stream(struct v4l2_subdev *sd, int enable) +{ + struct sc2235_dev *sensor = to_sc2235_dev(sd); + int ret = 0; + + mutex_lock(&sensor->lock); + + if (sensor->streaming == !enable) { + if (enable && sensor->pending_mode_change) { + ret = sc2235_set_mode(sensor); + if (ret) + goto out; + } + + if (enable && sensor->pending_fmt_change) { + ret = sc2235_set_framefmt(sensor, &sensor->fmt); + if (ret) + goto out; + sensor->pending_fmt_change = false; + } + + if (sensor->ep.bus_type == V4L2_MBUS_PARALLEL) + ret = sc2235_set_stream_dvp(sensor, enable); + + if (!ret) + sensor->streaming = enable; + } +out: + mutex_unlock(&sensor->lock); + + return ret; +} + +static const struct v4l2_subdev_core_ops sc2235_core_ops = { + .s_power = sc2235_s_power, + .log_status = v4l2_ctrl_subdev_log_status, + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_video_ops sc2235_video_ops = { + .g_frame_interval = sc2235_g_frame_interval, + .s_frame_interval = sc2235_s_frame_interval, + .s_stream = sc2235_s_stream, +}; + +static const struct v4l2_subdev_pad_ops sc2235_pad_ops = { + .enum_mbus_code = sc2235_enum_mbus_code, + .get_fmt = sc2235_get_fmt, + .set_fmt = sc2235_set_fmt, + .enum_frame_size = sc2235_enum_frame_size, + .enum_frame_interval = sc2235_enum_frame_interval, +}; + +static const struct v4l2_subdev_ops sc2235_subdev_ops = { + .core = &sc2235_core_ops, + .video = &sc2235_video_ops, + .pad = &sc2235_pad_ops, +}; + +static int sc2235_get_regulators(struct sc2235_dev *sensor) +{ + int i; + + for (i = 0; i < SC2235_NUM_SUPPLIES; i++) + sensor->supplies[i].supply = sc2235_supply_name[i]; + + return devm_regulator_bulk_get(&sensor->i2c_client->dev, + SC2235_NUM_SUPPLIES, + sensor->supplies); +} + +static int sc2235_check_chip_id(struct sc2235_dev *sensor) +{ + struct i2c_client *client = sensor->i2c_client; + int ret = 0; + u16 chip_id; + + ret = sc2235_set_power_on(sensor); + if (ret) + return ret; + + ret = sc2235_read_reg16(sensor, SC2235_REG_CHIP_ID, &chip_id); + if (ret) { + dev_err(&client->dev, "%s: failed to read chip identifier\n", + __func__); + goto power_off; + } + + if (chip_id != SC2235_CHIP_ID) { + dev_err(&client->dev, "%s: wrong chip identifier, expected 0x%x, got 0x%x\n", + __func__, SC2235_CHIP_ID, chip_id); + ret = -ENXIO; + } + dev_err(&client->dev, "%s: chip identifier, got 0x%x\n", + __func__, chip_id); + +power_off: + sc2235_set_power_off(sensor); + return ret; +} + +static int sc2235_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct fwnode_handle *endpoint; + struct sc2235_dev *sensor; + struct v4l2_mbus_framefmt *fmt; + u32 rotation; + int ret; + u8 chip_id_high, chip_id_low; + + sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOMEM; + + sensor->i2c_client = client; + + fmt = &sensor->fmt; + fmt->code = MEDIA_BUS_FMT_SGBRG10_1X10; + fmt->colorspace = V4L2_COLORSPACE_SRGB; + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); + fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); + fmt->width = 1920; + fmt->height = 1080; + fmt->field = V4L2_FIELD_NONE; + sensor->frame_interval.numerator = 1; + sensor->frame_interval.denominator = sc2235_framerates[SC2235_30_FPS]; + sensor->current_fr = SC2235_30_FPS; + sensor->current_mode = + &sc2235_mode_data[SC2235_MODE_1080P_1920_1080]; + sensor->last_mode = sensor->current_mode; + + sensor->ae_target = 52; + + /* optional indication of physical rotation of sensor */ + ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation", + &rotation); + if (!ret) { + switch (rotation) { + case 180: + sensor->upside_down = true; + fallthrough; + case 0: + break; + default: + dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n", + rotation); + } + } + + endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), + NULL); + if (!endpoint) { + dev_err(dev, "endpoint node not found\n"); + return -EINVAL; + } + + ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep); + fwnode_handle_put(endpoint); + if (ret) { + dev_err(dev, "Could not parse endpoint\n"); + return ret; + } + + if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL && + sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY && + sensor->ep.bus_type != V4L2_MBUS_BT656) { + dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type); + return -EINVAL; + } + + /* get system clock (xclk) */ + sensor->xclk = devm_clk_get(dev, "xclk"); + if (IS_ERR(sensor->xclk)) { + dev_err(dev, "failed to get xclk\n"); + return PTR_ERR(sensor->xclk); + } + + sensor->xclk_freq = clk_get_rate(sensor->xclk); + if (sensor->xclk_freq < SC2235_XCLK_MIN || + sensor->xclk_freq > SC2235_XCLK_MAX) { + dev_err(dev, "xclk frequency out of range: %d Hz\n", + sensor->xclk_freq); + return -EINVAL; + } +#if 0 + /*At present, the GPIO of the sensor is configured in the Uboot system, + and these GPIOs are controlled by the kernel GPIO subsystem API after + it is ready 2021 1110 */ + /* request optional power down pin */ + sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown", + GPIOD_OUT_HIGH); + if (IS_ERR(sensor->pwdn_gpio)) + return PTR_ERR(sensor->pwdn_gpio); + + /* request optional reset pin */ + sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(sensor->reset_gpio)) + return PTR_ERR(sensor->reset_gpio); +#endif + v4l2_i2c_subdev_init(&sensor->sd, client, &sc2235_subdev_ops); + + sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | + V4L2_SUBDEV_FL_HAS_EVENTS; + sensor->pad.flags = MEDIA_PAD_FL_SOURCE; + sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; + ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); + if (ret) + return ret; + + ret = sc2235_get_regulators(sensor); + if (ret) + return ret; + mutex_init(&sensor->lock); + + ret = sc2235_check_chip_id(sensor); + if (ret) + goto entity_cleanup; + + ret = sc2235_init_controls(sensor); + if (ret) + goto entity_cleanup; + + ret = v4l2_async_register_subdev_sensor(&sensor->sd); + if (ret) + goto free_ctrls; + + return 0; + +free_ctrls: + v4l2_ctrl_handler_free(&sensor->ctrls.handler); +entity_cleanup: + media_entity_cleanup(&sensor->sd.entity); + mutex_destroy(&sensor->lock); + return ret; +} + +static int sc2235_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct sc2235_dev *sensor = to_sc2235_dev(sd); + + v4l2_async_unregister_subdev(&sensor->sd); + media_entity_cleanup(&sensor->sd.entity); + v4l2_ctrl_handler_free(&sensor->ctrls.handler); + mutex_destroy(&sensor->lock); + + return 0; +} + +static const struct i2c_device_id sc2235_id[] = { + {"sc2235", 0}, + {}, +}; +MODULE_DEVICE_TABLE(i2c, sc2235_id); + +static const struct of_device_id sc2235_dt_ids[] = { + { .compatible = "sc2235" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, sc2235_dt_ids); + +static struct i2c_driver sc2235_i2c_driver = { + .driver = { + .name = "sc2235", + .of_match_table = sc2235_dt_ids, + }, + .id_table = sc2235_id, + .probe_new = sc2235_probe, + .remove = sc2235_remove, +}; + +module_i2c_driver(sc2235_i2c_driver); + +MODULE_DESCRIPTION("SC2235 MIPI Camera Subdev Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_common.h b/drivers/media/platform/starfive/v4l2_driver/stf_common.h new file mode 100755 index 0000000..2e5f99e --- /dev/null +++ b/drivers/media/platform/starfive/v4l2_driver/stf_common.h @@ -0,0 +1,208 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 StarFive Technology Co., Ltd. + */ +#ifndef STF_COMMON_H +#define STF_COMMON_H + +#include + +// #define STF_DEBUG + +// #define USE_CSIDPHY_ONE_CLK_MODE 1 + +enum { + ST_DVP = 0x0001, + ST_CSIPHY = 0x0002, + ST_CSI = 0x0004, + ST_ISP = 0x0008, + ST_VIN = 0x0010, + ST_VIDEO = 0x0020, + ST_CAMSS = 0x0040, + ST_SENSOR= 0x0080, +}; + +enum { + ST_NONE = 0x00, + ST_ERR = 0x01, + ST_WARN = 0x02, + ST_INFO = 0x03, + ST_DEBUG = 0x04, +}; + +extern unsigned int stdbg_level; +extern unsigned int stdbg_mask; + +#define ST_MODULE2STRING(__module) ({ \ + char *__str; \ + \ + switch (__module) { \ + case ST_DVP: \ + __str = "st_dvp"; \ + break; \ + case ST_CSIPHY: \ + __str = "st_csiphy"; \ + break; \ + case ST_CSI: \ + __str = "st_csi"; \ + break; \ + case ST_ISP: \ + __str = "st_isp"; \ + break; \ + case ST_VIN: \ + __str = "st_vin"; \ + break; \ + case ST_VIDEO: \ + __str = "st_video"; \ + break; \ + case ST_CAMSS: \ + __str = "st_camss"; \ + break; \ + case ST_SENSOR: \ + __str = "st_sensor"; \ + break; \ + default: \ + __str = "unknow"; \ + break; \ + } \ + \ + __str; \ + }) + +#define st_debug(module, __fmt, arg...) \ + do { \ + if (stdbg_level > ST_INFO) { \ + if (stdbg_mask & module) \ + pr_err("[%s] debug: " __fmt, \ + ST_MODULE2STRING(module), \ + ## arg); \ + } \ + } while (0) + +#define st_info(module, __fmt, arg...) \ + do { \ + if (stdbg_level > ST_WARN) { \ + if (stdbg_mask & module) \ + pr_err("[%s] info: " __fmt, \ + ST_MODULE2STRING(module), \ + ## arg); \ + } \ + } while (0) + +#define st_warn(module, __fmt, arg...) \ + do { \ + if (stdbg_level > ST_ERR) { \ + if (stdbg_mask & module) \ + pr_err("[%s] warn: " __fmt, \ + ST_MODULE2STRING(module), \ + ## arg); \ + } \ + } while (0) + +#define st_err(module, __fmt, arg...) \ + do { \ + if (stdbg_level > ST_NONE) { \ + if (stdbg_mask & module) \ + pr_err("[%s] error: " __fmt, \ + ST_MODULE2STRING(module), \ + ## arg); \ + } \ + } while (0) + +#define st_err_ratelimited(module, fmt, ...) \ + do { \ + static DEFINE_RATELIMIT_STATE(_rs, \ + DEFAULT_RATELIMIT_INTERVAL, \ + DEFAULT_RATELIMIT_BURST); \ + if (__ratelimit(&_rs) && (stdbg_level > ST_NONE)) { \ + if (stdbg_mask & module) \ + pr_err("[%s] error: " fmt, \ + ST_MODULE2STRING(module), \ + ##__VA_ARGS__); \ + } \ + } while (0) + +#define set_bits(p, v, b, m) (((p) & ~(m)) | ((v) << (b))) + +static inline u32 reg_read(void __iomem * base, u32 reg) +{ + return ioread32(base + reg); +} + +static inline void reg_write(void __iomem * base, u32 reg, u32 val) +{ + iowrite32(val, base + reg); +} + +static inline void reg_set_bit(void __iomem * base, u32 reg, u32 mask, u32 val) +{ + u32 value; + + value = ioread32(base + reg) & ~mask; + val &= mask; + val |= value; + iowrite32(val, base + reg); +} + +static inline void reg_set(void __iomem * base, u32 reg, u32 mask) +{ + iowrite32(ioread32(base + reg) | mask, base + reg); +} + +static inline void reg_clear(void __iomem * base, u32 reg, u32 mask) +{ + iowrite32(ioread32(base + reg) & ~mask, base + reg); +} + +static inline void reg_clear_rst(void __iomem * base, u32 reg1, u32 reg2, uint32_t mask) +{ + u32 val; + + val = ioread32(base + reg1); + val &= ~mask; + iowrite32(val, base + reg1); + do{ + val = ioread32(base + reg2); + }while((val&mask)!=mask); + +} + +static void reg_assert_rst(void __iomem * base, u32 reg1, u32 reg2, uint32_t mask) +{ + u32 val; + + val = ioread32(base + reg1); + val |= mask; + iowrite32(val, base + reg1); + do{ + val = ioread32(base + reg2); + }while((val&mask)!=0); +} + +static inline void reg_set_highest_bit(void __iomem * base, u32 reg) +{ + u32 val; + + val = ioread32(base + reg); + val &= ~(0x1 << 31); + val |= (0x1 & 0x1) << 31; + iowrite32(val, base + reg); +} + +static inline void reg_clr_highest_bit(void __iomem * base, u32 reg) +{ + u32 val; + + val = ioread32(base + reg); + val &= ~(0x1 << 31); + val |= (0x0 & 0x1) << 31; + iowrite32(val, base + reg); +} + +static inline void print_reg(unsigned int module, void __iomem * base, u32 reg) +{ + st_debug(module, "REG 0x%x = 0x%x\n", + base + reg, ioread32(base + reg)); +} + +#endif /* STF_COMMON_H */ diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_csi.c b/drivers/media/platform/starfive/v4l2_driver/stf_csi.c new file mode 100755 index 0000000..555cca2 --- /dev/null +++ b/drivers/media/platform/starfive/v4l2_driver/stf_csi.c @@ -0,0 +1,412 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 StarFive Technology Co., Ltd. + */ +#include "stfcamss.h" +#include +#include +#include +#include +#include +#include + +#define STF_CSI_NAME "stf_csi" + +static const struct csi_format csi_formats_st7110[] = { + { MEDIA_BUS_FMT_YUYV8_2X8, 16}, + { MEDIA_BUS_FMT_RGB565_2X8_LE, 16}, + { MEDIA_BUS_FMT_SRGGB10_1X10, 12}, + { MEDIA_BUS_FMT_SGRBG10_1X10, 12}, + { MEDIA_BUS_FMT_SGBRG10_1X10, 12}, + { MEDIA_BUS_FMT_SBGGR10_1X10, 12}, +}; + +static int csi_find_format(u32 code, + const struct csi_format *formats, + unsigned int nformats) +{ + int i; + + for (i = 0; i < nformats; i++) + if (formats[i].code == code) + return i; + return -EINVAL; +} + +int stf_csi_subdev_init(struct stfcamss *stfcamss, int id) +{ + struct stf_csi_dev *csi_dev = &stfcamss->csi_dev[id]; + + csi_dev->id = id; + csi_dev->csiphy_id = id; + csi_dev->s_type = SENSOR_VIN; + csi_dev->hw_ops = &csi_ops; + csi_dev->stfcamss = stfcamss; + csi_dev->formats = csi_formats_st7110; + csi_dev->nformats = ARRAY_SIZE(csi_formats_st7110); + mutex_init(&csi_dev->stream_lock); + return 0; +} + +static int csi_set_power(struct v4l2_subdev *sd, int on) +{ + struct stf_csi_dev *csi_dev = v4l2_get_subdevdata(sd); + + return 0; +} + +static struct v4l2_mbus_framefmt * +__csi_get_format(struct stf_csi_dev *csi_dev, + struct v4l2_subdev_state *state, + unsigned int pad, + enum v4l2_subdev_format_whence which) +{ + if (which == V4L2_SUBDEV_FORMAT_TRY) + return v4l2_subdev_get_try_format(&csi_dev->subdev, state, pad); + + return &csi_dev->fmt[pad]; +} + +static int csi_set_stream(struct v4l2_subdev *sd, int enable) +{ + struct stf_csi_dev *csi_dev = v4l2_get_subdevdata(sd); + struct stf_csi_dev *csi0_dev = &csi_dev->stfcamss->csi_dev[0]; + struct v4l2_mbus_framefmt *format; + int ret = 0, is_raw10 = 0; + u32 code; + + if (csi_dev->id == 1) + csi_set_stream(&csi0_dev->subdev, enable); + + format = __csi_get_format(csi_dev, NULL, STF_CSI_PAD_SRC, + V4L2_SUBDEV_FORMAT_ACTIVE); + if (format == NULL) + return -EINVAL; + ret = csi_find_format(format->code, + csi_dev->formats, + csi_dev->nformats); + if (ret < 0) + return ret; + + code = csi_dev->formats[ret].code; + if (code == MEDIA_BUS_FMT_SBGGR10_1X10 || + code == MEDIA_BUS_FMT_SGBRG10_1X10 || + code == MEDIA_BUS_FMT_SGRBG10_1X10 || + code == MEDIA_BUS_FMT_SRGGB10_1X10) + is_raw10 = 1; + + mutex_lock(&csi_dev->stream_lock); + if (enable) { + if (csi_dev->stream_count == 0) { + csi_dev->hw_ops->csi_config_set(csi_dev); + csi_dev->hw_ops->csi_clk_enable(csi_dev); + csi_dev->hw_ops->csi_set_format(csi_dev, + format->height, + csi_dev->formats[ret].bpp, is_raw10); + csi_dev->hw_ops->csi_stream_set(csi_dev, enable); + } + csi_dev->stream_count++; + } else { + if (csi_dev->stream_count == 0) + goto exit; + if (csi_dev->stream_count == 1) { + csi_dev->hw_ops->csi_stream_set(csi_dev, enable); + csi_dev->hw_ops->csi_clk_disable(csi_dev); + } + csi_dev->stream_count--; + } +exit: + mutex_unlock(&csi_dev->stream_lock); + return 0; +} + +static void csi_try_format(struct stf_csi_dev *csi_dev, + struct v4l2_subdev_state *state, + unsigned int pad, + struct v4l2_mbus_framefmt *fmt, + enum v4l2_subdev_format_whence which) +{ + unsigned int i; + + switch (pad) { + case STF_CSI_PAD_SINK: + /* Set format on sink pad */ + + for (i = 0; i < csi_dev->nformats; i++) + if (fmt->code == csi_dev->formats[i].code) + break; + + if (i >= csi_dev->nformats) + fmt->code = MEDIA_BUS_FMT_RGB565_2X8_LE; + + fmt->width = clamp_t(u32, + fmt->width, + 1, + STFCAMSS_FRAME_MAX_WIDTH); + fmt->height = clamp_t(u32, + fmt->height, + 1, + STFCAMSS_FRAME_MAX_HEIGHT_PIX); + + fmt->field = V4L2_FIELD_NONE; + fmt->colorspace = V4L2_COLORSPACE_SRGB; + fmt->flags = 0; + + break; + + case STF_CSI_PAD_SRC: + + *fmt = *__csi_get_format(csi_dev, state, STF_CSI_PAD_SINK, which); + + break; + } +} + +static int csi_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct stf_csi_dev *csi_dev = v4l2_get_subdevdata(sd); + + if (code->index >= csi_dev->nformats) + return -EINVAL; + if (code->pad == STF_CSI_PAD_SINK) { + code->code = csi_dev->formats[code->index].code; + } else { + struct v4l2_mbus_framefmt *sink_fmt; + + sink_fmt = __csi_get_format(csi_dev, state, STF_CSI_PAD_SINK, + code->which); + + code->code = sink_fmt->code; + if (!code->code) + return -EINVAL; + } + code->flags = 0; + + return 0; +} + +static int csi_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_size_enum *fse) +{ + struct stf_csi_dev *csi_dev = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt format; + + if (fse->index != 0) + return -EINVAL; + + format.code = fse->code; + format.width = 1; + format.height = 1; + csi_try_format(csi_dev, state, fse->pad, &format, fse->which); + fse->min_width = format.width; + fse->min_height = format.height; + + if (format.code != fse->code) + return -EINVAL; + + format.code = fse->code; + format.width = -1; + format.height = -1; + csi_try_format(csi_dev, state, fse->pad, &format, fse->which); + fse->max_width = format.width; + fse->max_height = format.height; + + return 0; +} + +static int csi_get_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *fmt) +{ + struct stf_csi_dev *csi_dev = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *format; + + format = __csi_get_format(csi_dev, state, fmt->pad, fmt->which); + if (format == NULL) + return -EINVAL; + + fmt->format = *format; + + return 0; +} + +static int csi_set_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *fmt) +{ + struct stf_csi_dev *csi_dev = v4l2_get_subdevdata(sd); + struct v4l2_mbus_framefmt *format; + int ret; + + format = __csi_get_format(csi_dev, state, fmt->pad, fmt->which); + if (format == NULL) + return -EINVAL; + + csi_try_format(csi_dev, state, fmt->pad, &fmt->format, fmt->which); + *format = fmt->format; + + /* Propagate the format from sink to source */ + if (fmt->pad == STF_CSI_PAD_SINK) { + format = __csi_get_format(csi_dev, state, STF_CSI_PAD_SRC, + fmt->which); + + *format = fmt->format; + csi_try_format(csi_dev, state, STF_CSI_PAD_SRC, format, + fmt->which); + } + + return 0; +} + +static int csi_init_formats(struct v4l2_subdev *sd, + struct v4l2_subdev_fh *fh) +{ + struct v4l2_subdev_format format = { + .pad = STF_CSI_PAD_SINK, + .which = fh ? V4L2_SUBDEV_FORMAT_TRY : + V4L2_SUBDEV_FORMAT_ACTIVE, + .format = { + .code = MEDIA_BUS_FMT_RGB565_2X8_LE, + .width = 1920, + .height = 1080 + } + }; + + return csi_set_format(sd, fh ? fh->state : NULL, &format); +} + +static int csi_link_setup(struct media_entity *entity, + const struct media_pad *local, + const struct media_pad *remote, u32 flags) +{ + if ((local->flags & MEDIA_PAD_FL_SOURCE) && + (flags & MEDIA_LNK_FL_ENABLED)) { + struct v4l2_subdev *sd; + struct stf_csi_dev *csi_dev; + struct vin_line *line; + + if (media_entity_remote_pad(local)) + return -EBUSY; + + sd = media_entity_to_v4l2_subdev(entity); + csi_dev = v4l2_get_subdevdata(sd); + + sd = media_entity_to_v4l2_subdev(remote->entity); + line = v4l2_get_subdevdata(sd); + if (line->sdev_type == VIN_DEV_TYPE) + csi_dev->s_type = SENSOR_VIN; + if (line->sdev_type == ISP0_DEV_TYPE) + csi_dev->s_type = SENSOR_ISP0; + if (line->sdev_type == ISP1_DEV_TYPE) + csi_dev->s_type = SENSOR_ISP1; + st_info(ST_CSI, "CSI%d device sensor type: %d\n", + csi_dev->id, csi_dev->s_type); + } + + if ((local->flags & MEDIA_PAD_FL_SINK) && + (flags & MEDIA_LNK_FL_ENABLED)) { + struct v4l2_subdev *sd; + struct stf_csi_dev *csi_dev; + struct stf_csiphy_dev *csiphy_dev; + + if (media_entity_remote_pad(local)) + return -EBUSY; + + sd = media_entity_to_v4l2_subdev(entity); + csi_dev = v4l2_get_subdevdata(sd); + + sd = media_entity_to_v4l2_subdev(remote->entity); + csiphy_dev = v4l2_get_subdevdata(sd); + + csi_dev->csiphy_id = csiphy_dev->id; + st_info(ST_SENSOR, "CSI%d link to csiphy%d\n", + csi_dev->id, csi_dev->csiphy_id); + } + + return 0; +} + +static const struct v4l2_subdev_core_ops csi_core_ops = { + .s_power = csi_set_power, +}; + +static const struct v4l2_subdev_video_ops csi_video_ops = { + .s_stream = csi_set_stream, +}; + +static const struct v4l2_subdev_pad_ops csi_pad_ops = { + .enum_mbus_code = csi_enum_mbus_code, + .enum_frame_size = csi_enum_frame_size, + .get_fmt = csi_get_format, + .set_fmt = csi_set_format, +}; + +static const struct v4l2_subdev_ops csi_v4l2_ops = { + .core = &csi_core_ops, + .video = &csi_video_ops, + .pad = &csi_pad_ops, +}; + +static const struct v4l2_subdev_internal_ops csi_v4l2_internal_ops = { + .open = csi_init_formats, +}; + +static const struct media_entity_operations csi_media_ops = { + .link_setup = csi_link_setup, + .link_validate = v4l2_subdev_link_validate, +}; + +int stf_csi_register(struct stf_csi_dev *csi_dev, struct v4l2_device *v4l2_dev) +{ + struct v4l2_subdev *sd = &csi_dev->subdev; + struct device *dev = csi_dev->stfcamss->dev; + struct media_pad *pads = csi_dev->pads; + int ret; + + v4l2_subdev_init(sd, &csi_v4l2_ops); + sd->internal_ops = &csi_v4l2_internal_ops; + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d", + STF_CSI_NAME, csi_dev->id); + v4l2_set_subdevdata(sd, csi_dev); + + ret = csi_init_formats(sd, NULL); + if (ret < 0) { + dev_err(dev, "Failed to init format: %d\n", ret); + return ret; + } + + pads[STF_CSI_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + pads[STF_CSI_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE; + + sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER; + sd->entity.ops = &csi_media_ops; + ret = media_entity_pads_init(&sd->entity, STF_CSI_PADS_NUM, pads); + if (ret < 0) { + dev_err(dev, "Failed to init media entity: %d\n", ret); + return ret; + } + + ret = v4l2_device_register_subdev(v4l2_dev, sd); + if (ret < 0) { + dev_err(dev, "Failed to register subdev: %d\n", ret); + goto err_sreg; + } + + return 0; + +err_sreg: + media_entity_cleanup(&sd->entity); + return ret; +} + +int stf_csi_unregister(struct stf_csi_dev *csi_dev) +{ + v4l2_device_unregister_subdev(&csi_dev->subdev); + media_entity_cleanup(&csi_dev->subdev.entity); + mutex_destroy(&csi_dev->stream_lock); + return 0; +} diff --git a/drivers/media/platform/starfive/v4l2_driver/stf_csi.h b/drivers/media/platform/starfive/v4l2_driver/stf_csi.h new file mode 100755 index 0000000..0fa786b --- /dev/null +++ b/drivers/media/platform/starfive/v4l2_driver/stf_csi.h @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 StarFive Technology Co., Ltd. + */ +#ifndef STF_CSI_H +#define STF_CSI_H + +#include +#include +#include +#include