From: Noam Camus <noamc@ezchip.com>
Date: Sat, 12 Dec 2015 17:18:27 +0000 (+0200)
Subject: serial: 8250_dw: Do not use readl/writel before checking port iotype
X-Git-Tag: v4.6-rc1~118^2~117
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=5a43140cc4a59eda4549cc3b74989efa77973158;p=platform%2Fkernel%2Flinux-exynos.git

serial: 8250_dw: Do not use readl/writel before checking port iotype

Direct call to readl()/writel() is checked against iotype
and in case of UPIO_MEM32BE we use ioread32be()/iowrite32be()
instead of them.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 92c4a9b..30810ac 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -114,6 +114,8 @@ static void dw8250_check_lcr(struct uart_port *p, int value)
 #else
 		if (p->iotype == UPIO_MEM32)
 			writel(value, offset);
+		else if (p->iotype == UPIO_MEM32BE)
+			iowrite32be(value, offset);
 		else
 			writeb(value, offset);
 #endif
@@ -327,14 +329,20 @@ static void dw8250_setup_port(struct uart_port *p)
 	 * If the Component Version Register returns zero, we know that
 	 * ADDITIONAL_FEATURES are not enabled. No need to go any further.
 	 */
-	reg = readl(p->membase + DW_UART_UCV);
+	if (p->iotype == UPIO_MEM32BE)
+		reg = ioread32be(p->membase + DW_UART_UCV);
+	else
+		reg = readl(p->membase + DW_UART_UCV);
 	if (!reg)
 		return;
 
 	dev_dbg(p->dev, "Designware UART version %c.%c%c\n",
 		(reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
 
-	reg = readl(p->membase + DW_UART_CPR);
+	if (p->iotype == UPIO_MEM32BE)
+		reg = ioread32be(p->membase + DW_UART_CPR);
+	else
+		reg = readl(p->membase + DW_UART_CPR);
 	if (!reg)
 		return;