From: Yang Rong <rong.r.yang@intel.com>
Date: Wed, 29 Oct 2014 07:37:38 +0000 (+0800)
Subject: BDW: Fix bwd 32*32 scalar multiplication bug.
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=598fb285081e79dc5bf40d632c779c76a7c6ace3;p=contrib%2Fbeignet.git

BDW: Fix bwd 32*32 scalar multiplication bug.

When scalar multiplication, must disable predicate and don't need specail handle.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Tested-by: Zhu, BingbingX <bingbingx.zhu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
---

diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index 605fdd5..64e9fd8 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -2566,14 +2566,12 @@ namespace gbe
 
       sel.push();
       if (sel.has32X32Mul()) {
-        //Seems scalar mul need QWROD dst, otherwise will touch the dst's follow register.
         if (sel.isScalarReg(insn.getDst(0)) == true) {
           sel.curr.execWidth = 1;
-          GenRegister tmp = sel.selReg(sel.reg(FAMILY_QWORD), Type::TYPE_S64);
-          sel.MUL(tmp, src0, src1);
-          sel.MOV(dst, GenRegister::retype(tmp, GEN_TYPE_D));
-        } else
-          sel.MUL(dst, src0, src1);
+          sel.curr.predicate = GEN_PREDICATE_NONE;
+          sel.curr.noMask = 1;
+        }
+        sel.MUL(dst, src0, src1);
       } else {
         if (sel.isScalarReg(insn.getDst(0)) == true) {
           sel.curr.execWidth = 1;