From: Lionel Landwerlin Date: Wed, 10 Aug 2022 11:10:10 +0000 (+0000) Subject: intel/ds: track acceleration RT commands X-Git-Tag: upstream/23.3.3~1228 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=596b4389364c41678c2c6e38e5801ae0df2fab00;p=platform%2Fupstream%2Fmesa.git intel/ds: track acceleration RT commands Signed-off-by: Lionel Landwerlin Reviewed-by: Ivan Briano Reviewed-by: Tapani Pälli Part-of: --- diff --git a/src/intel/ds/intel_driver_ds.cc b/src/intel/ds/intel_driver_ds.cc index a27b9ae..2ccaf8b 100644 --- a/src/intel/ds/intel_driver_ds.cc +++ b/src/intel/ds/intel_driver_ds.cc @@ -80,6 +80,14 @@ static const struct { INTEL_DS_QUEUE_STAGE_COMPUTE, }, { + "as-build", + INTEL_DS_QUEUE_STAGE_AS, + }, + { + "RT", + INTEL_DS_QUEUE_STAGE_RT, + }, + { "render-pass", INTEL_DS_QUEUE_STAGE_RENDER_PASS, }, @@ -402,6 +410,8 @@ CREATE_DUAL_EVENT_CALLBACK(query_clear_blorp, INTEL_DS_QUEUE_STAGE_INTERNAL_OPS) CREATE_DUAL_EVENT_CALLBACK(query_clear_cs, INTEL_DS_QUEUE_STAGE_INTERNAL_OPS) CREATE_DUAL_EVENT_CALLBACK(query_copy_cs, INTEL_DS_QUEUE_STAGE_INTERNAL_OPS) CREATE_DUAL_EVENT_CALLBACK(query_copy_shader, INTEL_DS_QUEUE_STAGE_INTERNAL_OPS) +CREATE_DUAL_EVENT_CALLBACK(rays, INTEL_DS_QUEUE_STAGE_RT) +CREATE_DUAL_EVENT_CALLBACK(as_build, INTEL_DS_QUEUE_STAGE_AS) void intel_ds_begin_cmd_buffer_annotation(struct intel_ds_device *device, diff --git a/src/intel/ds/intel_driver_ds.h b/src/intel/ds/intel_driver_ds.h index 456b154..1f9df93 100644 --- a/src/intel/ds/intel_driver_ds.h +++ b/src/intel/ds/intel_driver_ds.h @@ -71,6 +71,8 @@ enum intel_ds_queue_stage { INTEL_DS_QUEUE_STAGE_INTERNAL_OPS, INTEL_DS_QUEUE_STAGE_STALL, INTEL_DS_QUEUE_STAGE_COMPUTE, + INTEL_DS_QUEUE_STAGE_AS, + INTEL_DS_QUEUE_STAGE_RT, INTEL_DS_QUEUE_STAGE_RENDER_PASS, INTEL_DS_QUEUE_STAGE_BLORP, INTEL_DS_QUEUE_STAGE_DRAW, diff --git a/src/intel/ds/intel_tracepoints.py b/src/intel/ds/intel_tracepoints.py index 2048a6b..937aaa2 100644 --- a/src/intel/ds/intel_tracepoints.py +++ b/src/intel/ds/intel_tracepoints.py @@ -178,6 +178,14 @@ def define_tracepoints(args): tp_args=[Arg(type='uint32_t', var='count', c_format='%u'),], need_cs_param=True) + begin_end_tp('as_build') + + begin_end_tp('rays', + tp_args=[Arg(type='uint32_t', var='group_x', c_format='%u'), + Arg(type='uint32_t', var='group_y', c_format='%u'), + Arg(type='uint32_t', var='group_z', c_format='%u'),], + tp_print=['group=%ux%ux%u', '__entry->group_x', '__entry->group_y', '__entry->group_z']) + def flag_bits(args): bits = [Arg(type='enum intel_ds_stall_flag', name='flags', var='decode_cb(flags)', c_format='0x%x')] for a in args: diff --git a/src/intel/vulkan/genX_acceleration_structure.c b/src/intel/vulkan/genX_acceleration_structure.c index acc8d7c..0552859 100644 --- a/src/intel/vulkan/genX_acceleration_structure.c +++ b/src/intel/vulkan/genX_acceleration_structure.c @@ -33,8 +33,9 @@ #include "genxml/genX_pack.h" #include "genxml/genX_rt_pack.h" -#if GFX_VERx10 == 125 +#include "ds/intel_tracepoints.h" +#if GFX_VERx10 == 125 #include "grl/grl_structs.h" /* Wait for the previous dispatches to finish and flush their data port @@ -622,6 +623,8 @@ cmd_build_acceleration_structures( return; } + trace_intel_begin_as_build(&cmd_buffer->trace); + /* TODO: Indirect */ assert(ppBuildRangeInfos != NULL); @@ -1103,6 +1106,8 @@ cmd_build_acceleration_structures( ANV_GRL_FLUSH_FLAGS, "building accel struct"); + trace_intel_end_as_build(&cmd_buffer->trace); + error: vk_free(&cmd_buffer->device->vk.alloc, builds); } diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index aa82d49e..9473d76 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -6254,6 +6254,8 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer, params->launch_size[2] == 0)) return; + trace_intel_begin_rays(&cmd_buffer->trace); + genX(cmd_buffer_config_l3)(cmd_buffer, pipeline->base.l3_config); genX(flush_pipeline_select_gpgpu)(cmd_buffer); @@ -6454,6 +6456,11 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer, STATIC_ASSERT(sizeof(trampoline_params) == 32); memcpy(cw.InlineData, &trampoline_params, sizeof(trampoline_params)); } + + trace_intel_end_rays(&cmd_buffer->trace, + params->launch_size[0], + params->launch_size[1], + params->launch_size[2]); } void