From: Minkyu Kang <mk7.kang@samsung.com>
Date: Thu, 5 Nov 2009 05:38:41 +0000 (+0900)
Subject: s5pc110: fb: fix the clock setting
X-Git-Tag: CES1223_2~156
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=56e2cba0dfb90398ec527840cc7a71ca97bfa94b;p=kernel%2Fu-boot.git

s5pc110: fb: fix the clock setting

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---

diff --git a/drivers/video/s5p-fimd.c b/drivers/video/s5p-fimd.c
index 9c5fb64..bd7e36e 100644
--- a/drivers/video/s5p-fimd.c
+++ b/drivers/video/s5p-fimd.c
@@ -26,6 +26,7 @@
 #include <asm/io.h>
 #include <lcd.h>
 
+#include <asm/arch/clk.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/regs-fb.h>
 #include <asm/arch/hardware.h>
@@ -51,8 +52,6 @@ static unsigned int ctrl_base;
 static unsigned long *lcd_base_addr;
 static vidinfo_t *pvid = NULL;
 
-extern unsigned long get_pll_clk(int pllreg);
-
 void s5pc_fimd_lcd_init_mem(u_long screen_base, u_long fb_size, u_long palette_size)
 {
 	lcd_base_addr = (unsigned long *)screen_base;
@@ -195,8 +194,7 @@ static void s5pc_fimd_set_clock(void)
 		printf("get_pll_clk is null.\n");
 		return;
 	}
-	//src_clock = get_pll_clk(MPLL);
-	src_clock = 667000000;
+	src_clock = get_pll_clk(MPLL);
 
 	cfg = readl(ctrl_base + S5P_VIDCON0);
 	cfg &= ~(S5P_VIDCON0_CLKSEL_MASK | S5P_VIDCON0_CLKVALUP_MASK | \