From: Thomas Lively Date: Thu, 13 Sep 2018 02:50:56 +0000 (+0000) Subject: [WebAssembly] Add missing SIMD instruction attributes X-Git-Tag: llvmorg-8.0.0-rc1~8835 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=56b34f6c51c8bee65cefd0bfb35b2a294032d6a3;p=platform%2Fupstream%2Fllvm.git [WebAssembly] Add missing SIMD instruction attributes Summary: These attributes are copied from equivalent instructions in WebAssemblyInstrInfo.td. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51518 llvm-svn: 342104 --- diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 9f41ec3..6bda0cb 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -19,13 +19,14 @@ foreach SIZE = [2, 4, 8, 16, 32] in def LaneIdx#SIZE : ImmLeaf; multiclass ConstVec { + let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in defm CONST_V128_#vec_t : SIMD_I<(outs V128:$dst), ops, (outs), ops, [(set V128:$dst, (vec_t pat))], "v128.const\t$dst, "#args, "v128.const\t"#args, 0>; } multiclass SIMDLoad { - let mayLoad = 1 in + let mayLoad = 1, isAsCheapAsAMove = 1 in defm LOAD_#vec_t : SIMD_I<(outs V128:$dst), (ins P2Align:$align, offset32_op:$off, I32:$addr), (outs), (ins P2Align:$align, offset32_op:$off), [], @@ -33,7 +34,7 @@ multiclass SIMDLoad { "v128.load\t$off$align", 1>; } multiclass SIMDStore { - let mayStore = 1 in + let mayStore = 1, isAsCheapAsAMove = 1 in defm STORE_#vec_t : SIMD_I<(outs), (ins P2Align:$align, offset32_op:$off, I32:$addr, V128:$vec), (outs), (ins P2Align:$align, offset32_op:$off), [],