From: Pat Gavlin Date: Wed, 11 Jan 2017 23:15:31 +0000 (-0800) Subject: Format code. X-Git-Tag: submit/tizen/20210909.063632~11030^2~8466^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=567aef968d9c7cddac221681bde5da2c71d7f39d;p=platform%2Fupstream%2Fdotnet%2Fruntime.git Format code. Commit migrated from https://github.com/dotnet/coreclr/commit/d7f28722caa2f6d8dc5c5ed74ec3f622dc13a57b --- diff --git a/src/coreclr/src/jit/emitxarch.cpp b/src/coreclr/src/jit/emitxarch.cpp index a68929b..a914c21 100644 --- a/src/coreclr/src/jit/emitxarch.cpp +++ b/src/coreclr/src/jit/emitxarch.cpp @@ -898,8 +898,8 @@ bool emitter::emitInsCanOnlyWriteSSE2OrAVXReg(instrDesc* id) // The following SSE2 instructions write to a general purpose integer register. if (!IsSSEOrAVXInstruction(ins) || ins == INS_mov_xmm2i || ins == INS_cvttsd2si #ifndef LEGACY_BACKEND - || ins == INS_cvttss2si || ins == INS_cvtsd2si || ins == INS_cvtss2si - || ins == INS_pmovmskb || ins == INS_pextrw + || ins == INS_cvttss2si || ins == INS_cvtsd2si || ins == INS_cvtss2si || ins == INS_pmovmskb || + ins == INS_pextrw #endif // !LEGACY_BACKEND ) {