From: Maxime Chevallier <maxime.chevallier@bootlin.com>
Date: Fri, 2 Sep 2022 08:32:05 +0000 (+0200)
Subject: dt-bindings: net: altera: tse: add an optional pcs register range
X-Git-Tag: v6.1-rc5~319^2~265^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=565f02fc1e5dc18a577545aaef3c1191cd011849;p=platform%2Fkernel%2Flinux-starfive.git

dt-bindings: net: altera: tse: add an optional pcs register range

Some implementations of the TSE have their PCS as an external bloc,
exposed at its own register range. Document this, and add a new example
showing a case using the pcs and the new phylink conversion to connect
an sfp port to a TSE mac.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

diff --git a/Documentation/devicetree/bindings/net/altr,tse.yaml b/Documentation/devicetree/bindings/net/altr,tse.yaml
index 78c7a20..8d1d944 100644
--- a/Documentation/devicetree/bindings/net/altr,tse.yaml
+++ b/Documentation/devicetree/bindings/net/altr,tse.yaml
@@ -95,7 +95,9 @@ allOf:
       properties:
         reg:
           minItems: 6
+          maxItems: 7
         reg-names:
+          minItems: 6
           items:
             - const: control_port
             - const: rx_csr
@@ -103,11 +105,36 @@ allOf:
             - const: rx_resp
             - const: tx_csr
             - const: tx_desc
+            - const: pcs
 
 unevaluatedProperties: false
 
 examples:
   - |
+    tse_sub_0: ethernet@c0100000 {
+        compatible = "altr,tse-msgdma-1.0";
+        reg = <0xc0100000 0x00000400>,
+              <0xc0101000 0x00000020>,
+              <0xc0102000 0x00000020>,
+              <0xc0103000 0x00000008>,
+              <0xc0104000 0x00000020>,
+              <0xc0105000 0x00000020>,
+              <0xc0106000 0x00000100>;
+        reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc", "pcs";
+        interrupt-parent = <&intc>;
+        interrupts = <0 44 4>,<0 45 4>;
+        interrupt-names = "rx_irq","tx_irq";
+        rx-fifo-depth = <2048>;
+        tx-fifo-depth = <2048>;
+        max-frame-size = <1500>;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+        altr,has-supplementary-unicast;
+        altr,has-hash-multicast-filter;
+        sfp = <&sfp0>;
+        phy-mode = "sgmii";
+        managed = "in-band-status";
+    };
+  - |
     tse_sub_1_eth_tse_0: ethernet@1,00001000 {
         compatible = "altr,tse-msgdma-1.0";
         reg = <0x00001000 0x00000400>,