From: Madhu Date: Sun, 22 Nov 2009 18:11:08 +0000 (-0800) Subject: omap3630: Set omap3630 MMC1 I/O speed to 52Mhz X-Git-Tag: v2.6.33-rc1~381^2~43 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=555d503ff30b3b1292d743bb77b19212b6befb59;p=profile%2Fivi%2Fkernel-x86-ivi.git omap3630: Set omap3630 MMC1 I/O speed to 52Mhz The speed ctrl bit for MMC I/O is part of CONTROL_PROG_IO1 register in omap3630.This patch sets it up accordingly. Signed-off-by: Madhusudhan Chikkature Signed-off-by: Tony Lindgren --- diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c index 7bef170..0c3c72d 100644 --- a/arch/arm/mach-omap2/mmc-twl4030.c +++ b/arch/arm/mach-omap2/mmc-twl4030.c @@ -213,7 +213,7 @@ static int twl4030_mmc_get_context_loss(struct device *dev) static int twl_mmc1_set_power(struct device *dev, int slot, int power_on, int vdd) { - u32 reg; + u32 reg, prog_io; int ret = 0; struct twl_mmc_controller *c = &hsmmc[0]; struct omap_mmc_platform_data *mmc = dev->platform_data; @@ -245,7 +245,14 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on, } reg = omap_ctrl_readl(control_pbias_offset); - reg |= OMAP2_PBIASSPEEDCTRL0; + if (cpu_is_omap3630()) { + /* Set MMC I/O to 52Mhz */ + prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1); + prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL; + omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); + } else { + reg |= OMAP2_PBIASSPEEDCTRL0; + } reg &= ~OMAP2_PBIASLITEPWRDNZ0; omap_ctrl_writel(reg, control_pbias_offset); diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 79985e4..2ae8843 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -241,6 +241,9 @@ #define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) #define OMAP2_PBIASLITEVMODE0 (1 << 0) +/* CONTROL_PROG_IO1 bits */ +#define OMAP3630_PRG_SDMMC1_SPEEDCTRL (1 << 20) + /* CONTROL_IVA2_BOOTMOD bits */ #define OMAP3_IVA2_BOOTMOD_SHIFT 0 #define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0)