From: Mark Kettenis Date: Sun, 30 Jun 2019 16:01:53 +0000 (+0200) Subject: rockchip: clk: rk3399: handle clk_enable requests for USB3 X-Git-Tag: v2019.10-rc1~20^2~146 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=555ceca0886ccf24116bd32f3b5fc550ef592188;p=platform%2Fkernel%2Fu-boot.git rockchip: clk: rk3399: handle clk_enable requests for USB3 The "simple" OF glue layer for the Designware USB3 core enables all refernced clocks. These need to be need to be implemented otherwise the driver fails to probe. A dummy implementation that simply returns success is sufficient since the RK3399 comes out of reset with all clock gates open. Signed-off-by: Mark Kettenis Reviewed-by: Kever Yang --- diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index aa6a8ad..6c73fc9 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1078,6 +1078,18 @@ static int rk3399_clk_enable(struct clk *clk) case PCLK_GMAC: /* Required to successfully probe the Designware GMAC driver */ return 0; + + case SCLK_USB3OTG0_REF: + case SCLK_USB3OTG1_REF: + case SCLK_USB3OTG0_SUSPEND: + case SCLK_USB3OTG1_SUSPEND: + case ACLK_USB3OTG0: + case ACLK_USB3OTG1: + case ACLK_USB3_RKSOC_AXI_PERF: + case ACLK_USB3: + case ACLK_USB3_GRF: + /* Required to successfully probe the Designware USB3 driver */ + return 0; } debug("%s: unsupported clk %ld\n", __func__, clk->id);