From: Wyatt Wood <wyatt.wood@amd.com>
Date: Tue, 3 Nov 2020 20:07:33 +0000 (-0500)
Subject: drm/amd/display: Increase sr enter/exit in rn ddr4 watermark table
X-Git-Tag: v5.15~2259^2^2~296
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=54e5f12ce530dd260722033ed9756fb107972a3f;p=platform%2Fkernel%2Flinux-starfive.git

drm/amd/display: Increase sr enter/exit in rn ddr4 watermark table

[Why]
After removing added latency for HostVM by default, DDR4 sr exit
latencies were no longer large enough for some panels and caused
underflow.

[How]
Add 1us to sr enter/exit watermark.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index 8d8ee4b..458dab9 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -618,8 +618,8 @@ static struct wm_table ddr4_wm_table = {
 			.wm_inst = WM_A,
 			.wm_type = WM_TYPE_PSTATE_CHG,
 			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 6.09,
-			.sr_enter_plus_exit_time_us = 7.14,
+			.sr_exit_time_us = 7.09,
+			.sr_enter_plus_exit_time_us = 8.14,
 			.valid = true,
 		},
 		{