From: Leonid Yegoshin Date: Thu, 13 Nov 2014 13:39:39 +0000 (+0000) Subject: MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler X-Git-Tag: v4.0-rc1~4^2~26^2~37 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=54dac95083828e56ed1dee846c2e631f72361f86;p=platform%2Fkernel%2Flinux-exynos.git MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler Just like MIPS R2, in MIPS R6 it is possible to determine if a timer interrupt has happened or not. Signed-off-by: Leonid Yegoshin Signed-off-by: Markos Chandras --- diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c index 28bfdf2..82bd2b27 100644 --- a/arch/mips/kernel/cevt-r4k.c +++ b/arch/mips/kernel/cevt-r4k.c @@ -39,7 +39,7 @@ int cp0_timer_irq_installed; irqreturn_t c0_compare_interrupt(int irq, void *dev_id) { - const int r2 = cpu_has_mips_r2; + const int r2 = cpu_has_mips_r2_r6; struct clock_event_device *cd; int cpu = smp_processor_id();